ATMEGA16U4-MU Atmel, ATMEGA16U4-MU Datasheet - Page 228
ATMEGA16U4-MU
Manufacturer Part Number
ATMEGA16U4-MU
Description
MCU AVR 16K FLASH 16MHZ 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA16U4-MU.pdf
(433 pages)
Specifications of ATMEGA16U4-MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
26
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATMEGA16U4-16MU
ATMEGA16U4-16MU
ATMEGA16U4-16MU
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20.5
7766F–AVR–11/10
Overview of the TWI Module
bits. If several masters are trying to address the same Slave, arbitration will continue into the
data packet.
Figure 20-8. Arbitration Between Two Masters
Note that arbitration is not allowed between:
It is the user software’s responsibility to ensure that these illegal arbitration conditions never
occur. This implies that in multi-master systems, all data transfers must use the same composi-
tion of SLA+R/W and data packets. In other words: All transmissions must contain the same
number of data packets, otherwise the result of the arbitration is undefined.
The TWI module is comprised of several submodules, as shown in
drawn in a thick line are accessible through the AVR data bus.
• A REPEATED START condition and a data bit.
• A STOP condition and a data bit.
• A REPEATED START and a STOP condition.
Synchronized
SCL Line
SDA from
SDA from
Master A
Master B
SDA Line
START
Arbitration, SDA
Master A Loses
ATmega16/32U4
Figure
A
SDA
20-9. All registers
228
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