AT89C51RC-24JU Atmel, AT89C51RC-24JU Datasheet - Page 10

• Manufacturer Part Number: AT89C51RC-24JU
• Description: IC 8051 MCU FLASH 32K 44PLCC
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51RC-24JU

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: SPI, UART/USART
• Peripherals: WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Package: 44PLCC
• Device Core: 8051
• Family Name: 89C
• Maximum Speed: 24 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 32
• Interface Type: UART
• Number Of Timers: 3
• Processor Series: AT89x
• Core: 8051
• Data Ram Size: 512 B
• Maximum Clock Frequency: 33 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• For Use With: AT89STK-11 - KIT STARTER FOR AT89C51RX2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

6. Memory Organization
7. Program Memory
7.1
10
Data Memory
AT89C51RC
The MCS-51 devices have a separate address space for Program and Data Memory. Up to 64K
bytes each of external Program and Data Memory can be addressed.
If the EA pin is connected to GND, all program fetches are directed to external memory.
On the AT89C51RC, if EA is connected to V
7FFFH are directed to internal memory and fetches to addresses 8000H through FFFFH are to
external memory.
The AT89C51RC has internal data memory that is mapped into four separate segments: the
lower 128 bytes of RAM, upper 128 bytes of RAM, 128 bytes special function register (SFR) and
256 bytes expanded RAM (ERAM).
The four segments are:
The Lower 128 bytes can be accessed by either direct or indirect addressing. The Upper 128
bytes can be accessed by indirect addressing only. The Upper 128 bytes occupy the same
address space as the SFR. This means they have the same address, but are physically sepa-
rate from the SFR space.
When an instruction accesses an internal location above address 7FH, the CPU knows whether
the access is to the upper 128 bytes of data RAM or to SFR space by the addressing mode used
in the instruction. Instructions that use direct addressing access SFR space. For example:
accesses the SFR at location 0S0H (which is P2). Instructions that use indirect addressing
access the Upper 128 bytes of data RAM. For example:
where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 (whose
address is 0A0H).
Note that stack operations are examples of indirect addressing, so the upper 128 bytes of data
RAM are available as stack space.
The 256 bytes of ERAM can be accessed by indirect addressing, with EXTRAM bit cleared and
MOVX instructions. This part of memory is physically located on-chip, logically occupying the
first 256 bytes of external data memory.
1. The Lower 128 bytes of RAM (addresses 00H to 7FH) are directly and indirectly
2. The Upper 128 bytes of RAM (addresses 80H to FFH) are indirectly addressable only.
3. The Special Function Registers, SFRs, (addresses 80H to FFH) are directly address-
4. The 256-byte expanded RAM (ERAM, 00H-FFH) is indirectly accessed by MOVX
MOV 0A0H, # data
MOV@R0, # data
addressable.
able only.
instructions, and with the EXTRAM bit cleared.
CC
, program fetches to addresses 0000H through
1920D–MICRO–6/08