ATMEGA324PA-MUR Atmel, ATMEGA324PA-MUR Datasheet - Page 165
ATMEGA324PA-MUR
Manufacturer Part Number
ATMEGA324PA-MUR
Description
MCU AVR 32KB FLASH 20 MHZ 44QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA324PA-AUR.pdf
(468 pages)
Specifications of ATMEGA324PA-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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8152G–AVR–11/09
When the SPI is enabled, the data direction of the MOSI, MISO, SCK, and SS pins is overridden
according to
Functions” on page
Table 17-1.
Note:
The following code examples show how to initialize the SPI as a Master and how to perform a
simple transmission. DDR_SPI in the examples must be replaced by the actual Data Direction
Register controlling the SPI pins. DD_MOSI, DD_MISO and DD_SCK must be replaced by the
actual data direction bits for these pins. E.g. if MOSI is placed on pin PB5, replace DD_MOSI
with DDB5 and DDR_SPI with DDRB.
MOSI
MISO
SCK
Pin
SS
1. See
direction of the user defined SPI pins.
Table
SPI Pin Overrides
”Alternate Functions of Port B” on page 84
Direction, Master SPI
User Defined
Input
User Defined
User Defined
17-1. For more details on automatic port overrides, refer to
80.
ATmega164PA/324PA/644PA/1284P
(1)
for a detailed description of how to define the
Direction, Slave SPI
Input
User Defined
Input
Input
”Alternate Port
165
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