ATMEGA32U4-MUR Atmel, ATMEGA32U4-MUR Datasheet - Page 160
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ATMEGA32U4-MUR
Manufacturer Part Number
ATMEGA32U4-MUR
Description
MCU AVR 16K FLASH 16MHZ 44VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA16U4-MU.pdf
(433 pages)
Specifications of ATMEGA32U4-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA32U4-MUR
Manufacturer:
UCC
Quantity:
1 001
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7766F–AVR–11/10
It is important to notice that accessing 10-bit registers are atomic operations. If an interrupt
occurs between the two instructions accessing the 10-bit register, and the interrupt code
updates the TC4H register by accessing the same or any other of the 10-bit timer registers, then
the result of the access outside the interrupt will be corrupted. Therefore, when both the main
code and the interrupt code update the TC4H register, the main code must disable the interrupts
during the 16-bit access.
The following code examples show how to do an atomic read of the TCNTn register contents.
Reading any of the OCRnA/B/C/D registers can be done by using the same principle.
Note:
The assembly code example returns the TCNTn value in the r17:r16 register pair.
Assembly Code Example
TIM1_ReadTCNTn:
C Code Example
unsigned int TIM1_ReadTCNTn( void )
{
}
; Save global interrupt flag
in r18,SREG
; Disable interrupts
cli
; Read TCNTn into r17:r16
in r16,TCNTn
in r17,TCnH
; Restore global interrupt flag
out SREG,r18
ret
unsigned char sreg;
unsigned int i;
/* Save global interrupt flag */
sreg = SREG;
/* Disable interrupts */
_CLI();
/* Read TCNTn into i */
i = TCNTn;
i |= ((unsigned int)TCnH << 8);
/* Restore global interrupt flag
SREG = sreg;
return i;
1. The example code assumes that the part specific header file is included.
For I/O registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI”
instructions must be replaced with instructions that allow access to extended I/O. Typically
“LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
ATmega16/32U4
160
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