ATMEGA32U4-MUR Atmel, ATMEGA32U4-MUR Datasheet - Page 225
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ATMEGA32U4-MUR
Manufacturer Part Number
ATMEGA32U4-MUR
Description
MCU AVR 16K FLASH 16MHZ 44VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA16U4-MU.pdf
(433 pages)
Specifications of ATMEGA32U4-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA32U4-MUR
Manufacturer:
UCC
Quantity:
1 001
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20.3.3
7766F–AVR–11/10
Address Packet Format
depicted below, START and STOP conditions are signalled by changing the level of the SDA
line when the SCL line is high.
Figure 20-3. START, REPEATED START and STOP conditions
All address packets transmitted on the TWI bus are 9 bits long, consisting of 7 address bits, one
READ/WRITE control bit and an acknowledge bit. If the READ/WRITE bit is set, a read opera-
tion is to be performed, otherwise a write operation should be performed. When a Slave
recognizes that it is being addressed, it should acknowledge by pulling SDA low in the ninth SCL
(ACK) cycle. If the addressed Slave is busy, or for some other reason can not service the Mas-
ter’s request, the SDA line should be left high in the ACK clock cycle. The Master can then
transmit a STOP condition, or a REPEATED START condition to initiate a new transmission. An
address packet consisting of a slave address and a READ or a WRITE bit is called SLA+R or
SLA+W, respectively.
The MSB of the address byte is transmitted first. Slave addresses can freely be allocated by the
designer, but the address 0000 000 is reserved for a general call.
When a general call is issued, all slaves should respond by pulling the SDA line low in the ACK
cycle. A general call is used when a Master wishes to transmit the same message to several
slaves in the system. When the general call address followed by a Write bit is transmitted on the
bus, all slaves set up to acknowledge the general call will pull the SDA line low in the ack cycle.
The following data packets will then be received by all the slaves that acknowledged the general
call. Note that transmitting the general call address followed by a Read bit is meaningless, as
this would cause contention if several slaves started transmitting different data.
All addresses of the format 1111 xxx should be reserved for future purposes.
Figure 20-4. Address Packet Format
SDA
SCL
SDA
SCL
START
START
Addr MSB
1
STOP
2
START
Addr LSB
7
REPEATED START
ATmega16/32U4
R/W
8
ACK
9
STOP
225
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