ATMEGA32U4-MUR Atmel, ATMEGA32U4-MUR Datasheet - Page 260
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ATMEGA32U4-MUR
Manufacturer Part Number
ATMEGA32U4-MUR
Description
MCU AVR 16K FLASH 16MHZ 44VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA16U4-MU.pdf
(433 pages)
Specifications of ATMEGA32U4-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA32U4-MUR
Manufacturer:
UCC
Quantity:
1 001
- Current page: 260 of 433
- Download datasheet (9Mb)
21.7.3
21.8
21.9
7766F–AVR–11/10
Speed Control
Memory management
Freeze clock
The firmware has the ability to reduce the power consumption by setting the FRZCLK bit, which
freeze the clock of USB controller. When FRZCLK is set, it is still possible to access to the fol-
lowing registers:
Moreover, when FRZCLK is set, only the following interrupts may be triggered:
The speed selection (Full Speed or Low Speed) depends on the D+/D- pull-up. The LSM bit in
UDCON register allows to select an internal pull up on D- (Low Speed mode) or D+ (Full Speed
mode) data lines.
Figure 21-11. Device mode Speed Selection
The controller only supports the following memory allocation management.
The reservation of a Pipe or an Endpoint can only be made in the increasing order (Pipe/End-
point 0 to the last Pipe/Endpoint). The firmware shall thus configure them in the same order.
The reservation of a Pipe or an Endpoint “k
ware allocates the memory and inserts it between the Pipe/Endpoints “k
Pipe/Endpoint memory “slides” up and its data is lost. Note that the “k
point memory does not slide.
Clearing a Pipe enable (PEN) or an Endpoint enable (EPEN) does not clear either its ALLOC bit,
or its configuration (EPSIZE/PSIZE, EPBK/PBK). To free its memory, the firmware should clear
ALLOC. Then, the “k
and upper Pipe/Endpoint memory does not slide.
• USBCON, USBSTA, USBINT
• UDCON (detach, ...)
• UDINT
• UDIEN
• WAKEUPI
• VBUSTI
UCAP
D+
D-
i+1
” Pipe/Endpoint memory automatically “slides” down. Note that the “k
i
” is done when its ALLOC bit is set. Then, the hard-
DETACH
UDCON.0
UDCON.2
LSM
ATmega16/32U4
Regulator
USB
i+2
i-1
” and upper Pipe/End-
” and “k
i+1
”. The “k
260
i+1
i+2
”
”
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