ATMEGA32U4-MUR Atmel, ATMEGA32U4-MUR Datasheet - Page 264
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ATMEGA32U4-MUR
Manufacturer Part Number
ATMEGA32U4-MUR
Description
MCU AVR 16K FLASH 16MHZ 44VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA16U4-MU.pdf
(433 pages)
Specifications of ATMEGA32U4-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA32U4-MUR
Manufacturer:
UCC
Quantity:
1 001
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- Download datasheet (9Mb)
7766F–AVR–11/10
• 5 – FRZCLK: Freeze USB Clock Bit
Set to disable the clock inputs (the ”Resume Detection” is still active). This reduces the power
consumption. Clear to enable the clock inputs.
• 4 – OTGPADE: VBUS Pad Enable
Set to enable the VBUS pad. Clear to disable the VBUS pad.
Note that this bit can be set/cleared even if USBE=0. That allows the VBUS detection even if the
USB macro is disable.
• 3-1 – Reserved
The value read from these bits is always 0. Do not set these bits.
• 0 – VBUSTE: VBUS Transition Interrupt Enable Bit
Set this bit to enable the VBUS Transition interrupt generation.
Clear this bit to disable the VBUS Transition interrupt generation.
• 7-2 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 1 - ID: ID status
This bit is always read as “1”, it has been conserved for compatibility with AT90USB64/128 (in
which it indicates the value of the OTG ID pin).
• 0 – VBUS: VBus Flag
The value read from this bit indicates the state of the VBUS pin. This bit can be used in device
mode to monitor the USB bus connection state of the application. See Section 21.11, page 262
for more details.
7-1 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 0 – VBUSTI: IVBUS Transition Interrupt Flag
Set by hardware when a transition (high to low, low to high) has been detected on the VBUS
pad.
Shall be cleared by software.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
R
7
0
R
-
7
0
-
R
6
0
-
R
6
0
-
R
5
0
-
R
5
0
-
R
4
0
-
R
4
0
-
R
3
0
-
R
3
0
-
R
2
0
-
R
2
0
-
ATmega16/32U4
ID
R
1
1
R/W
1
0
-
VBUS
VBUSTI
R
0
0
R/W
0
0
USBSTA
USBINT
264
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