AT91SAM7S32B-AU-999 Atmel, AT91SAM7S32B-AU-999 Datasheet - Page 242
AT91SAM7S32B-AU-999
Manufacturer Part Number
AT91SAM7S32B-AU-999
Description
IC MCU ARM7 32KB FLASH 48LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM7S16-MU.pdf
(779 pages)
Specifications of AT91SAM7S32B-AU-999
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, JTAG, SPI, USART
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
21
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7S-EK
Minimum Operating Temperature
- 40 C
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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27.4
Figure 27-3. I/O Line Control Logic
242
Output Enable
Output Enable
Peripheral A
Peripheral B
Functional Description
Peripheral A
Peripheral B
PIO_BSR[0]
PIO_ASR[0]
AT91SAM7S Series Preliminary
Output
Output
PIO_ABSR[0]
PIO_OER[0]
PIO_ODR[0]
The PIO Controller features up to 32 fully-programmable I/O lines. Most of the control logic asso-
ciated to each I/O is represented in
represents but one of up to 32 possible indexes.
1
1
0
0
PIO_OSR[0]
PIO_IFER[0]
PIO_IFDR[0]
PIO_SODR[0]
PIO_CODR[0]
PIO_IFSR[0]
PIO_PER[0]
PIO_PDR[0]
Glitch
Filter
PIO_ODSR[0]
PIO_PSR[0]
PIO_PDSR[0]
1
0
PIO_IER[31]
PIO_IDR[31]
PIO_IER[0]
PIO_IDR[0]
1
0
1
0
Detector
Edge
PIO_IMR[31]
PIO_ISR[31]
PIO_IMR[0]
PIO_ISR[0]
PIO_MDER[0]
PIO_MDDR[0]
Figure
PIO_MDSR[0]
27-3. In this description each signal shown
(Up to 32 possible inputs)
1
0
0
1
PIO_PUER[0]
PIO_PUDR[0]
PIO_PUSR[0]
PIO Interrupt
Peripheral B
Peripheral A
Input
Input
6175K–ATARM–30-Aug-10
Pad
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