AT91SAM7S32B-AU-999 Atmel, AT91SAM7S32B-AU-999 Datasheet - Page 493
AT91SAM7S32B-AU-999
Manufacturer Part Number
AT91SAM7S32B-AU-999
Description
IC MCU ARM7 32KB FLASH 48LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM7S16-MU.pdf
(779 pages)
Specifications of AT91SAM7S32B-AU-999
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, JTAG, SPI, USART
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
21
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7S-EK
Minimum Operating Temperature
- 40 C
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 493 of 779
- Download datasheet (11Mb)
34.6.9
Register Name:
Access Type:
• CPRE: Channel Pre-scaler
• CALG: Channel Alignment
0 = The period is left aligned.
1 = The period is center aligned.
• CPOL: Channel Polarity
0 = The output waveform starts at a low level.
1 = The output waveform starts at a high level.
• CPD: Channel Update Period
0 = Writing to the PWM_CUPDx will modify the duty cycle at the next period start event.
1 = Writing to the PWM_CUPDx will modify the period at the next period start event.
6175K–ATARM–30-Aug-10
0
0
0
0
0
0
0
0
1
1
1
1
1
31
23
15
–
–
–
7
–
PWM Channel Mode Register
0
0
0
0
1
1
1
1
0
0
0
0
1
30
22
14
–
–
–
6
–
PWM_CMR[0..X-1]
Read/Write
CPRE
Other
0
0
1
1
0
0
1
1
0
0
1
1
0
29
21
13
–
–
–
5
–
0
1
0
1
0
1
0
1
0
1
0
1
0
28
20
12
–
–
–
4
–
MCK
MCK/2
MCK/4
MCK/8
MCK/16
MCK/32
MCK/64
MCK/128
MCK/256
MCK/512
MCK/1024
CLKA
CLKB
Reserved
AT91SAM7S Series Preliminary
27
19
11
–
–
–
3
Channel Pre-scaler
CPD
26
18
10
–
–
2
CPRE
CPOL
25
17
–
–
9
1
CALG
24
16
–
–
8
0
493
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