ATMEGA8515-16PU Atmel, ATMEGA8515-16PU Datasheet - Page 158
ATMEGA8515-16PU
Manufacturer Part Number
ATMEGA8515-16PU
Description
IC AVR MCU 8K 16MHZ 5V 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8515-16PU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Cpu Speed
16 MIPS
Eeprom Memory
512 Bytes
Input Output
35
Interface
SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
8K Bytes
Timers
1-8-bit, 1-16-bit
Voltage, Range
4.5-5.5 V
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
35
Number Of Timers
2
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA8515-16PU
Manufacturer:
AT
Quantity:
20 000
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ATmega8515(L)
Table 64. UPM Bits Settings
• Bit 3 – USBS: Stop Bit Select
This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver
ignores this setting.
Table 65. USBS Bit Settings
• Bit 2:1 – UCSZ1:0: Character Size
The UCSZ1:0 bits combined with the UCSZ2 bit in UCSRB sets the number of data bits
(character size) in a frame the Receiver and Transmitter use.
Table 66. UCSZ Bits Settings
• Bit 0 – UCPOL: Clock Polarity
This bit is used for Synchronous mode only. Write this bit to zero when Asynchronous
mode is used. The UCPOL bit sets the relationship between data output change and
data input sample, and the synchronous clock (XCK).
Table 67. UCPOL Bit Settings
UCPOL
0
1
UCSZ2
UPM1
0
0
0
0
1
1
1
1
0
0
1
1
Transmitted Data Changed
(Output of TxD Pin)
Rising XCK Edge
Falling XCK Edge
USBS
0
1
UCSZ1
UPM0
0
0
1
1
0
0
1
1
0
1
0
1
Parity Mode
Disabled
Reserved
Enabled, Even Parity
Enabled, Odd Parity
UCSZ0
0
1
0
1
0
1
0
1
Received Data Sampled
(Input on RxD Pin)
Falling XCK Edge
Rising XCK Edge
Stop Bit(s)
Character Size
5-bit
6-bit
7-bit
8-bit
Reserved
Reserved
Reserved
9-bit
1-bit
2-bit
2512K–AVR–01/10
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