ATMEGA16-16MQ Atmel, ATMEGA16-16MQ Datasheet - Page 217

• Manufacturer Part Number: ATMEGA16-16MQ
• Description: MCU AVR 16K FLASH 16MHZ 44-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16-16MQ

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-VQFN Exposed Pad
• Processor Series: ATMEGA16x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• For Use With: ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADC Multiplexer
Selection Register –
ADMUX
2466T–AVR–07/10
Table 82. Correlation between Input Voltage and Output Codes
Example:
• Bit 7:6 – REFS1:0: Reference Selection Bits
These bits select the voltage reference for the ADC, as shown in
changed during a conversion, the change will not go in effect until this conversion is complete
(ADIF in ADCSRA is set). The internal voltage reference options may not be used if an external
reference voltage is being applied to the AREF pin.
Table 83. Voltage Reference Selections for ADC
• Bit 5 – ADLAR: ADC Left Adjust Result
The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register.
Write one to ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the
ADLAR bit will affect the ADC Data Register immediately, regardless of any ongoing conver-
Bit
Read/Write
Initial Value
V
V
V
...
V
V
V
...
V
V
REFS1
V
ADCn
ADCm
ADCm
ADCm
ADCm
ADCm
ADCm
ADCm
ADCm
ADMUX = 0xED (ADC3 - ADC2, 10x gain, 2.56V reference, left adjusted result)
Voltage on ADC3 is 300 mV, voltage on ADC2 is 500 mV.
ADCR = 512 × 10 × (300 - 500) / 2560 = -400 = 0x270
ADCL will thus read 0x00, and ADCH will read 0x9C. Writing zero to ADLAR right adjusts
the result: ADCL = 0x70, ADCH = 0x02.
0
0
1
1
+ 511/512 V
+ 510/512 V
+ 1/512 V
- 1/512 V
- 511/512 V
- V
+ V
REF
REF
REFS0
/GAIN
/GAIN
REFS1
0
1
0
1
R/W
REF
7
0
REF
REF
REF
REF
/GAIN
/GAIN
/GAIN
Voltage Reference Selection
AREF, Internal Vref turned off
AVCC with external capacitor at AREF pin
Reserved
Internal 2.56V Voltage Reference with external capacitor at AREF pin
/GAIN
/GAIN
REFS0
R/W
6
0
ADLAR
R/W
5
0
Read code
0x1FF
0x1FF
0x1FE
...
0x001
0x000
0x3FF
...
0x201
0x200
MUX4
R/W
4
0
MUX3
R/W
3
0
Corresponding Decimal Value
511
511
510
...
1
0
-1
...
-511
-512
MUX2
R/W
2
0
MUX1
R/W
1
0
Table
ATmega16(L)
MUX0
R/W
0
0
83. If these bits are
ADMUX
217