PIC16C55-XTI/SS Microchip Technology, PIC16C55-XTI/SS Datasheet - Page 37

IC MCU OTP 512X12 28SSOP

PIC16C55-XTI/SS

Manufacturer Part Number
PIC16C55-XTI/SS
Description
IC MCU OTP 512X12 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet

Specifications of PIC16C55-XTI/SS

Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
20
Program Memory Size
768B (512 x 12)
Program Memory Type
OTP
Ram Size
24 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6.25 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
For Use With
309-1026 - ADAPTER 28-SSOP TO 28-DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
7.0
As with any other register, the I/O Registers can be
written and read under program control. However, read
instructions (e.g., MOVF PORTB,W) always read the I/O
pins independent of the pin’s input/output modes. On
RESET, all I/O ports are defined as input (inputs are at
hi-impedance) since the I/O control registers (TRISA,
TRISB, TRISC) are all set.
7.1
PORTA is a 4-bit I/O Register. Only the low order 4 bits
are used (RA<3:0>). Bits 7-4 are unimplemented and
read as '0's.
7.2
PORTB is an 8-bit I/O Register (PORTB<7:0>).
7.3
PORTC is an 8-bit I/O Register for PIC16C55,
PIC16C57 and PIC16CR57.
PORTC is a General Purpose Register for PIC16C54,
PIC16CR54, PIC16C56, PIC16CR56, PIC16C58 and
PIC16CR58.
7.4
The Output Driver Control Registers are loaded with
the contents of the W Register by executing the
TRIS f instruction. A '1' from a TRIS Register bit puts
the corresponding output driver in a hi-impedance
(input) mode. A '0' puts the contents of the output data
latch on the selected pins, enabling the output buffer.
The TRIS Registers are “write-only” and are set (output
drivers disabled) upon RESET.
TABLE 7-1:
Legend: x = unknown, u = unchanged, — = unimplemented, read as '0', Shaded cells = unimplemented, read as ‘0’
Note:
Address
2002 Microchip Technology Inc.
N/A
05h
06h
07h
I/O PORTS
PORTA
PORTB
PORTC
TRIS Registers
A read of the ports reads the pins, not the
output data latches. That is, if an output
driver on a pin is enabled and driven high,
but the external system is holding it low, a
read of the port will indicate that the pin is
low.
PORTC
PORTA
PORTB
Name
TRIS
SUMMARY OF PORT REGISTERS
Bit 7
RB7
RC7
Bit 6
RB6
RC6
I/O Control Registers (TRISA, TRISB, TRISC)
Bit 5
RC5
RB5
Preliminary
Bit 4
RB4
RC4
Bit 3
RA3
RB3
RC3
7.5
The equivalent circuit for an I/O port pin is shown in
Figure 7-1. All ports may be used for both input and
output operation. For input operations these ports are
non-latching. Any input must be present until read by
an input instruction (e.g., MOVF PORTB, W). The out-
puts are latched and remain unchanged until the output
latch is rewritten. To use a port pin as output, the corre-
sponding direction control bit (in TRISA, TRISB,
TRISC) must be cleared (= 0). For use as an input, the
corresponding TRIS bit must be set. Any I/O pin can be
programmed individually as input or output.
FIGURE 7-1:
Note 1: I/O pins have protection diodes to V
Data
Bus
WR
Port
W
Reg
TRIS ‘f’
Bit 2
RC2
RA2
RB2
I/O Interfacing
D
D
RESET
CK
CK
Bit 1
RA1
RC1
RB1
TRIS
Latch
Data
Latch
Q
Q
Q
Q
Bit 0
RA0
RB0
RC0
EQUIVALENT CIRCUIT
FOR A SINGLE I/O PIN
RD Port
PIC16C5X
1111 1111
---- xxxx
xxxx xxxx
xxxx xxxx
Power-On
Value on
Reset
DS30453D-page 35
V
V
P
N
SS
DD
DD
WDT Reset
1111 1111
---- uuuu
uuuu uuuu
uuuu uuuu
MCLR and
Value on
and V
I/O
pin
SS
(1)
.

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