ATMEGA164A-PU Atmel, ATMEGA164A-PU Datasheet - Page 271

IC MCU AVR 16K 20MHZ 40PDIP

ATMEGA164A-PU

Manufacturer Part Number
ATMEGA164A-PU
Description
IC MCU AVR 16K 20MHZ 40PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA164A-PU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
Atmega
No. Of I/o's
32
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
20MHz
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
8272A–AVR–01/10
The Boundary-scan logic is not included in the figures in the datasheet.
simple digital port pin as described in the section
details from
When no alternate port function is present, the Input Data - ID - corresponds to the PINxn Regis-
ter value (but ID has no synchronizer), Output Data corresponds to the PORT Register, Output
Control corresponds to the Data Direction - DD Register, and the Pull-up Enable - PUExn - cor-
responds to logic expression PUD · DDxn · PORTxn.
Digital alternate port functions are connected outside the dotted box in
scan chain read the actual pin value. For analog function, there is a direct connection from the
external pin to the analog circuit. There is no scan chain on the interface between the digital and
the analog circuitry, but some digital control signal to analog circuitry are turned off to avoid driv-
ing contention on the pads.
When JTAG IR contains EXTEST or SAMPLE_PRELOAD the clock is not sent out on the port
pins even if the CKOUT fuse is programmed. Even though the clock is output when the JTAG IR
contains SAMPLE_PRELOAD, the clock is not sampled by the boundary scan.
Figure 24-3. Boundary-scan Cell for Bi-directional Port Pin with Pull-up Function.
164A/164PA/324A/324PA/644A/644PA/1284/1284P
Pull-up Enable (PUE)
Output Control (OC)
Output Data (OD)
Input Data (ID)
Figure 24-3
replaces the dashed box in
0
1
From Last Cell
0
1
0
1
ShiftDR
ClockDR
D
D
FF1
FF0
To Next Cell
Q
Q
”I/O-Ports” on page
UpdateDR
Figure
D
G
D
G
LD1
LD0
24-4.
Q
Q
0
1
0
1
0
1
EXTEST
Figure 24-4
73. The Boundary-scan
Figure 24-4
Vcc
to make the
shows a
271

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