DSPIC30F4013-20E/PT Microchip Technology, DSPIC30F4013-20E/PT Datasheet - Page 52

• Manufacturer Part Number: DSPIC30F4013-20E/PT
• Description: IC DSPIC MCU/DSP 48K 44TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4013-20E/PT

• Program Memory Type: FLASH
• Program Memory Size: 48KB (16K x 24)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
• Number Of I /o: 30
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 30
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
• Minimum Operating Temperature: - 40 C
• Package: 44TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 13-chx12-bit
• Number Of Timers: 5
• Core Frequency: 20MHz
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 30
• Flash Memory Size: 48KB
• Supply Voltage Range: 2.5V To 5.5V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC30F006 - MODULE SKT FOR DSPIC30F 44TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F401320EPT

11.12 Reading Data Memory
The procedure for reading data memory is similar to
that of reading code memory, except that 16-bit data
words are read instead of 24-bit words. Since less data
is read in each operation, only working registers
W0:W3 are used as temporary holding registers for the
data to be read.
TABLE 11-12: SERIAL INSTRUCTION EXECUTION FOR READING DATA MEMORY
DS70102K-page 52
Step 1: Exit the Reset vector.
0000
0000
0000
Step 2: Initialize TBLPAG and the read pointer (W6) for TBLRD instruction.
0000
0000
0000
Step 3: Initialize the write pointer (W7) and store the next four locations of code memory to W0:W5.
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
Step 4: Output W0:W5 using the VISI register and REGOUT command.
0000
0000
0001
0000
0000
0000
0001
0000
0000
0000
0001
0000
0000
0000
0001
0000
Step 5: Reset device internal PC.
0000
0000
Step 6: Repeat steps 3-5 until all desired data memory is read.
Command
(Binary)
(Hexadecimal)
040100
040100
000000
2007F0
880190
2xxxx6
EB0380
000000
BA1BB6
000000
000000
BA1BB6
000000
000000
BA1BB6
000000
000000
BA1BB6
000000
000000
883C20
000000
<VISI>
000000
883C21
000000
<VISI>
000000
883C22
000000
<VISI>
000000
883C23
000000
<VISI>
000000
040100
000000
Data
GOTO 0x100
GOTO 0x100
NOP
MOV
MOV
MOV
CLR
NOP
TBLRDL [W6++], [W7++]
NOP
NOP
TBLRDL [W6++], [W7++]
NOP
NOP
TBLRDL [W6++], [W7++]
NOP
NOP
TBLRDL [W6++], [W7++]
NOP
NOP
MOV
NOP
Clock out contents of VISI register
NOP
MOV
NOP
Clock out contents of VISI register
NOP
MOV
NOP
Clock out contents of VISI register
NOP
MOV
NOP
Clock out contents of VISI register
NOP
GOTO 0x100
NOP
#0x7F, W0
W0, TBLPAG
#<SourceAddress15:0>, W6
W7
W0, VISI
W1, VISI
W2, VISI
W3, VISI
Table 11-12
reading data memory. Note that the TBLPAG register is
hard-coded to 0x7F (the upper byte address of all
locations of data memory).
Description
shows the ICSP programming details for
© 2010 Microchip Technology Inc.