ATMEGA32U4-AU Atmel, ATMEGA32U4-AU Datasheet - Page 140

• Manufacturer Part Number: ATMEGA32U4-AU
• Description: MCU AVR 32K FLASH 16MHZ 44-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA32U4-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2.5 KB
• Interface Type: SPI/TWI/USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 16MHz
• Total Internal Ram Size: 2.5KB
• # I/os (max): 26
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: TQFP
• Controller Family/series: AVR MEGA
• No. Of I/o's: 26
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2.5KB
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATMEGA32U4-16AU; ATMEGA32U4-16AU

15.2.3
15.2.4
7766F–AVR–11/10
Registers
Synchronization
The Timer/Counter (TCNT4) and Output Compare Registers (OCR4A, OCR4B, OCR4C and
OCR4D) are 8-bit registers that are used as a data source to be compared with the TCNT4 con-
tents. The OCR4A, OCR4B and OCR4D registers determine the action on the OC4A, OC4B and
OC4D pins and they can also generate the compare match interrupts. The OCR4C holds the
Timer/Counter TOP value, i.e. the clear on compare match value. The Timer/Counter4 High
Byte Register (TC4H) is a 2-bit register that is used as a common temporary buffer to access the
MSB bits of the Timer/Counter4 registers, if the 10-bit accuracy is used.
Interrupt request (overflow TOV4, compare matches OCF4A, OCF4B, OCF4D and fault protec-
tion FPF4) signals are visible in the Timer Interrupt Flag Register (TIFR4) and Timer/Counter4
Control Register D (TCCR4D). The interrupts are individually masked with the Timer Interrupt
Mask Register (TIMSK4) and the FPIE4 bit in the Timer/Counter4 Control Register D (TCCR4D).
Control signals are found in the Timer/Counter Control Registers TCCR4A, TCCR4B, TCCR4C,
TCCR4D and TCCR4E.
In asynchronous clocking mode the Timer/Counter4 and the prescaler allow running the CPU
from any clock source while the prescaler is operating on the fast peripheral clock (PCK) having
frequency up to 64 MHz. This is possible because there is a synchronization boundary between
the CPU clock domain and the fast peripheral clock domain.
synchronization register block diagram and describes synchronization delays in between regis-
ters. Note that all clock gating details are not shown in the figure.
The Timer/Counter4 register values go through the internal synchronization registers, which
cause the input synchronization delay, before affecting the counter operation. The registers
TCCR4A, TCCR4B, TCCR4C, TCCR4D, OCR4A, OCR4B, OCR4C and OCR4D can be read
back right after writing the register. The read back values are delayed for the Timer/Counter4
(TCNT4) register, Timer/Counter4 High Byte Register (TC4H) and flags (OCF4A, OCF4B,
OCF4D and TOV4), because of the input and output synchronization.
The system clock frequency must be lower than half of the PCK frequency, because the syn-
chronization mechanism of the asynchronous Timer/Counter4 needs at least two edges of the
PCK when the system clock is high. If the frequency of the system clock is too high, it is a risk
that data or control values are lost.
Figure 15-2
ATmega16/32U4
shows Timer/Counter 4
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