ATMEGA32U4-AU Atmel, ATMEGA32U4-AU Datasheet - Page 305

MCU AVR 32K FLASH 16MHZ 44-TQFP

ATMEGA32U4-AU

Manufacturer Part Number
ATMEGA32U4-AU
Description
MCU AVR 32K FLASH 16MHZ 44-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA32U4-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2.5 KB
Interface Type
SPI/TWI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
26
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
2.5KB
# I/os (max)
26
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
TQFP
Controller Family/series
AVR MEGA
No. Of I/o's
26
Eeprom Memory Size
1KB
Ram Memory Size
2.5KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATMEGA32U4-16AU
ATMEGA32U4-16AU

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Quantity
Price
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24.8
7766F–AVR–11/10
ADC Conversion Result
Figure 24-14. Differential Non-linearity (DNL)
After the conversion is complete (ADIF is high), the conversion result can be found in the ADC
Result Registers (ADCL, ADCH).
For single ended conversion, the result is:
where V
Table 24-3 on page 307
0x3FF represents the selected reference voltage minus one LSB.
If differential channels are used, the result is:
where V
GAIN the selected gain factor and V
in two’s complement form, from 0x200 (-512d) through 0x1FF (+511d). Note that if the user
wants to perform a quick polarity check of the result, it is sufficient to read the MSB of the result
(ADC9 in ADCH). If the bit is one, the result is negative, and if this bit is zero, the result is posi-
tive.
Table 82 shows the resulting output codes if the differential input channel pair (ADCn - ADCm) is
selected with a reference voltage of V
• Quantization Error: Due to the quantization of the input voltage into a finite number of codes,
• Absolute Accuracy: The maximum deviation of an actual (unadjusted) transition compared to
a range of input voltages (1 LSB wide) will code to the same value. Always ± 0.5 LSB.
an ideal transition for any code. This is the compound effect of offset, gain error, differential
error, non-linearity, and quantization error. Ideal value: ± 0.5 LSB.
Figure 24-15
IN
POS
is the voltage on the selected input pin and V
is the voltage on the positive input pin, V
Output Code
shows the decoding of the differential input range.
0x000
0x3FF
and
0
Table 24-4 on page
1 LSB
ADC
REF
REF
ADC
=
the selected voltage reference. The result is presented
.
(
----------------------------------------------------------------------- -
V
=
POS
V
--------------------------
IN
V
REF
308). 0x000 represents analog ground, and
V
1023
NEG
NEG
V
REF
REF
) GAIN 512
the voltage on the negative input pin,
the selected voltage reference (see
ATmega16/32U4
V
REF
Input Voltage
305

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