DSPIC30F2020-30I/MM Microchip Technology, DSPIC30F2020-30I/MM Datasheet - Page 176

• Manufacturer Part Number: DSPIC30F2020-30I/MM
• Description: IC DSPIC MCU/DSP 12K 28QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2020-30I/MM

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-QFN
• Core Frequency: 15MHz
• Core Supply Voltage: 3.3V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28QFN-S EP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300023 - KIT DEMO DSPICDEM SMPS BUCKAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC30F1010/202X
REGISTER 16-3:
REGISTER 16-4:
DS70178C-page 174
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-1
bit 0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-12
bit 11-0
Note:
PCFG7
R/W-0
R/W-0
R/W-0
U-0
—
As an alternative to using the ADBASE Register, the ADCP0-5 ADC Pair Conversion Complete Interrupts
(Interrupts 37-42) can be used to invoke A to D conversion completion routines for individual ADC input
pairs. Refer to Section 16.9 “Individual Pair Interrupts”.
ADC Base Register: This register contains the base address of the user’s ADC Interrupt Service Rou-
tine jump table. This register, when read, contains the sum of the ADBASE register contents and the
encoded value of the PxRDY Status bits.
The encoder logic provides the bit number of the highest priority PxRDY bits where P0RDY is the
highest priority, and P5RDY is lowest priority.
Unimplemented: Read as ‘0’
Unimplemented: Read as ‘0’
PCFG<11:0>: A/D Port Configuration Control bits
1 = Port pin in Digital mode, port read input enabled, A/D input multiplexor connected to AV
0 = Port pin in Analog mode, port read input disabled, A/D samples pin voltage
Note:
PCFG6
R/W-0
R/W-0
R/W-0
U-0
—
A/D BASE REGISTER (ADBASE)
A/D PORT CONFIGURATION REGISTER (ADPCFG)
The encoding results are shifted left two bits so bits 1-0 of the result are always zero.
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
PCFG5
R/W-0
R/W-0
R/W-0
U-0
—
ADBASE<7:1>
PCFG4
R/W-0
R/W-0
R/W-0
U-0
Preliminary
ADBASE<15:8>
—
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
PCFG11
PCFG3
R/W-0
R/W-0
R/W-0
R/W-0
PCFG10
PCFG2
R/W-0
R/W-0
R/W-0
R/W-0
© 2006 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
PCFG9
PCFG1
R/W-0
R/W-0
R/W-0
R/W-0
PCFG8
PCFG0
R/W-0
R/W-0
R/W-0
U-0
SS
—
bit 8
bit 0
bit 8
bit 0