AT89C51RD2-SLSUM Atmel, AT89C51RD2-SLSUM Datasheet - Page 88

• Manufacturer Part Number: AT89C51RD2-SLSUM
• Description: IC 8051 MCU FLASH 64K 44PLCC
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51RD2-SLSUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 60MHz
• Connectivity: SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: UART, SPI
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Package: 44PLCC
• Device Core: 80C51
• Family Name: 89C
• Maximum Speed: 40 MHz
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-11 - KIT STARTER FOR AT89C51RX2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

22. Reduced EMI Mode
88
AT89C51RD2/ED2
The ALE signal is used to demultiplex address and data buses on port 0 when used with exter-
nal program or data memory. Nevertheless, during internal code execution, ALE signal is still
generated. In order to reduce EMI, ALE signal can be disabled by setting AO bit.
The AO bit is located in AUXR register at bit location 0. As soon as AO is set, ALE is no longer
output but remains active during MOVX and MOVC instructions and external fetches. During
ALE disabling, ALE pin is weakly pulled high.
Table 22-1.
AUXR - Auxiliary Register (8Eh)
Reset Value = XX00 10’HSB. XRAM’0b
Not bit addressable
Number
DPU
Bit
7
7
6
5
4
3
2
1
0
Mnemonic
EXTRAM
AUXR Register
XRS2
XRS1
XRS0
DPU
AO
Bit
M0
6
-
-
Description
Disable Weak Pull-up
Cleared by software to activate the permanent weak pull-up (default)
Set by software to disable the weak pull-up (reduce power consumption)
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Pulse length
Cleared to stretch MOVX control: the RD and the WR pulse length is 6 clock periods
(default).
Set to stretch MOVX control: the RD and the WR pulse length is 30 clock periods.
XRAM Size
XRS2 XRS1XRS0XRAM size
0
0
0
0
1
EXTRAM bit
Cleared to access internal XRAM using MOVX @ Ri/ @ DPTR.
Set to access external memory.
Programmed by hardware after Power-up regarding Hardware Security Byte (HSB),
default setting, XRAM selected.
ALE Output bit
Cleared, ALE is emitted at a constant rate of 1/6 the oscillator frequency (or 1/3 if X2
mode is used) (default). Set, ALE is active only during a MOVX or MOVC instruction is
used.
M0
5
0
0
1
1
0
0 256 bytes
1 512 bytes
0 768 bytes(default)
1 1024 bytes
0 1792 bytes
XRS2
4
XRS1
3
XRS0
2
EXTRAM
1
4235K–8051–05/08
AO
0