AT91CAP7E-NA-ZJ Atmel, AT91CAP7E-NA-ZJ Datasheet - Page 480
AT91CAP7E-NA-ZJ
Manufacturer Part Number
AT91CAP7E-NA-ZJ
Description
MCU CAP7 FPGA 225LFBGA
Manufacturer
Atmel
Series
CAP™r
Specifications of AT91CAP7E-NA-ZJ
Core Processor
ARM7
Core Size
16/32-Bit
Speed
80MHz
Connectivity
EBI/EMI, FPGA, IrDA, SPI, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
ROM
Ram Size
160K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
225-LFBGA
Processor Series
AT91Mx
Core
ARM7TDMI
Data Bus Width
32 bit
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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32.6.10
Register Name:
Access Type:
• EOCx: End of Conversion Interrupt Mask x
• OVREx: Overrun Error Interrupt Mask x
• DRDY: Data Ready Interrupt Mask
• GOVRE: General Overrun Error Interrupt Mask
• ENDRX: End of Receive Buffer Interrupt Mask
• RXBUFF: Receive Buffer Full Interrupt Mask
0 = The corresponding interrupt is disabled.
1 = The corresponding interrupt is enabled.
32.6.11
Register Name:
Access Type:
• DATA: Converted Data
The analog-to-digital conversion data is placed into this register at the end of a conversion and remains until a new conver-
sion is completed. The Convert Data Register (CDR) is only loaded if the corresponding analog channel is enabled.
480
OVRE7
EOC7
31
23
15
31
23
15
–
–
7
–
–
–
7
AT91CAP7E
ADC Interrupt Mask Register
ADC Channel Data Register
OVRE6
EOC6
30
22
14
30
22
14
ADC_IMR
Read-only
–
–
6
ADC_CDRx
Read-only
–
–
–
6
OVRE5
EOC5
29
21
13
29
21
13
–
–
5
–
–
–
5
OVRE4
EOC4
28
20
12
28
20
12
–
–
4
–
–
–
4
DATA
RXBUFF
OVRE3
EOC3
27
19
11
27
19
11
–
–
–
–
3
3
ENDRX
OVRE2
EOC2
26
18
10
26
18
10
–
2
–
–
–
2
GOVRE
OVRE1
EOC1
25
17
25
17
–
–
–
9
1
9
1
DATA
8549A–CAP–10/08
OVRE0
DRDY
EOC0
24
16
24
16
–
8
0
–
–
8
0
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