ATSAM3S4CA-AU Atmel, ATSAM3S4CA-AU Datasheet - Page 844
ATSAM3S4CA-AU
Manufacturer Part Number
ATSAM3S4CA-AU
Description
IC MCU 32BIT 256KB FLASH 100LQFP
Manufacturer
Atmel
Series
SAM3Sr
Specifications of ATSAM3S4CA-AU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
79
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 16x10/12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Controller Family/series
ATSAM3S
No. Of I/o's
79
Ram Memory Size
48KB
Cpu Speed
64MHz
No. Of Timers
6
Rohs Compliant
Yes
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Cpu Family
AT91
Device Core
ARM Cortex-M3
Device Core Size
32b
Frequency (max)
64MHz
Total Internal Ram Size
48KB
# I/os (max)
79
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.62V
On-chip Adc
16-chx12-bit
On-chip Dac
2-chx12-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S4CA-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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36.3
Figure 36-1. Pulse Width Modulation Controller Block Diagram
844
PWMFI0
PWMFIx
Block Diagram
SAM3S Preliminary
PMC
PIO
MCK
• Synchronous Channel mode
• Connection to one PDC channel
• independent event lines which can send up to 4 triggers on ADC within a period
• Programmable Fault Input providing an asynchronous protection of outputs
• Stepper motor control (2 Channels)
Generator
CLOCK
– Independent Clock Selection
– Independent Period and Duty Cycle, with Double Buffering
– Synchronous Channels share the same counter
– Mode to update the synchronous channels registers after a programmable number
– Offers Buffer transfer without Processor Intervention, to update duty cycle of
of periods
synchronous channels
Selector
Selector
Clock
Clock
Interface
APB
APB
Duty-Cycle
Channel x
Duty-Cycle
Channel 0
Counter
Counter
Update
Update
Period
Period
PDC
MUX
Comparator
Comparator
OCx
OC0
PWM Controller
Channel 0
Channel x
Dead-Time
Dead-Time
Generator
Generator
DTOHx
DTOLx
DTOH0
DTOL0
Comparison
Units
Override
Override
Output
Output
OOOHx
OOOLx
OOOH0
OOOL0
Protection
Protection
Interrupt Generator
Fault
Fault
Generator
Events
PWMHx
PWMLx
PWMH0
PWML0
event line 0
event line 1
event line x
6500C–ATARM–8-Feb-11
PIO
NVIC
ADC
PWMHx
PWMLx
PWML0
PWMH0
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