ATSAM3U2EA-CU Atmel, ATSAM3U2EA-CU Datasheet - Page 949
ATSAM3U2EA-CU
Manufacturer Part Number
ATSAM3U2EA-CU
Description
IC MCU 32BIT 128KB FLSH 144LFBGA
Manufacturer
Atmel
Series
SAM3Ur
Specifications of ATSAM3U2EA-CU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
96MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
36K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b, 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFBGA
Processor Series
ATSAM3x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
36 KB
Interface Type
4xUSART, 2xTWI, 5xSPI, Bus
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
96
Number Of Timers
8
Operating Supply Voltage
1.62 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3U-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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Manufacturer
Quantity
Price
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6430D–ATARM–25-Mar-11
6430D–ATARM–25-Mar-11
All endpoints (except endpoint 0) can be configured either as Bulk, Interrupt or Isochronous. See
Table 39-1. UDPHS Endpoint
The maximum packet size they can accept corresponds to the maximum endpoint size.
Note: The endpoint size of 1024 is reserved for isochronous endpoints.
The size of the DPRAM is 4 KB. The DPR is shared by all active endpoints. The memory size
required by the active endpoints must not exceed the size of the DPRAM.
SIZE_DPRAM = SIZE _EPT0
If a user tries to configure endpoints with a size the sum of which is greater than the DPRAM,
then the EPT_MAPD is not set.
The application has access to the physical block of DPR reserved for the endpoint through a
KB logical address space.
The physical block of DPR allocated for the endpoint is remapped all along the
address space. The application can write a
Figure 39-4. Logical Address Space for DPR Access
+ NB_BANK_EPT1 x SIZE_EPT1
+ NB_BANK_EPT2 x SIZE_EPT2
+ NB_BANK_EPT3 x SIZE_EPT3
+ NB_BANK_EPT4 x SIZE_EPT4
+ NB_BANK_EPT5 x SIZE_EPT5
+ NB_BANK_EPT6 x SIZE_EPT6
+... (refer to
39.7.11 UDPHS Endpoint Configuration
64 KB
EP0
64 KB
EP1
64 KB
EP2
64 KB
EP3
Logical address
...
8 to1024 B
8 to1024 B
8 to1024 B
8 to 64 B
...
Description.
64
KB buffer linearly.
Register)
DPR
8 to1024 B
8 to1024 B
8 to 64 B
8 to1024 B
8 to1024 B
SAM3U Series
SAM3U Series
1 bank
x banks
y banks
z banks
64
KB logical
949
949
64
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