P89LPC922A1FDH,112 NXP Semiconductors, P89LPC922A1FDH,112 Datasheet
P89LPC922A1FDH,112
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P89LPC9201/9211/922A1/9241/ 9251 8-bit microcontroller with accelerated two-clock 80C51 core 2 kB/4 kB byte-erasable flash with 8-bit ADC Rev. 2 — 1 December 2010 1. General description The P89LPC9201/9211/922A1/9241/9251 is a single-chip microcontroller, available in low cost packages, ...
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... NXP Semiconductors 2.2 Additional features A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns for all instructions except multiply and divide when executing at 18 MHz. This is six times the performance of the standard 80C51 running at the same clock frequency. A lower clock frequency for the same performance results in power savings and reduced EMI ...
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... NXP Semiconductors 3. Ordering information Table 1. Type number P89LPC9201FDH P89LPC9211FDH P89LPC922A1FDH P89LPC922A1FN P89LPC9241FDH P89LPC9251FDH 3.1 Ordering options Table 2. Type number P89LPC9201FDH P89LPC9211FDH P89LPC922A1FDH P89LPC922A1FN P89LPC9241FDH P89LPC9251FDH P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Ordering information Package Name Description TSSOP20 plastic thin shrink small outline package; 20 leads ...
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... NXP Semiconductors 4. Block diagram P89LPC9201/9211/922A1 P3[1:0] CONFIGURABLE I/Os P1[7:0] CONFIGURABLE I/Os P0[7:0] CONFIGURABLE I/Os PROGRAMMABLE OSCILLATOR DIVIDER XTAL1 CRYSTAL OR RESONATOR XTAL2 Fig 1. Block diagram (P89LPC9201/9211/922A1) P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ HIGH PERFORMANCE ACCELERATED 2-CLOCK 80C51 CPU 2 kB/4 kB/8 kB CODE FLASH internal ...
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... NXP Semiconductors P89LPC9241/9251 P3[1:0] CONFIGURABLE I/Os P1[7:0] CONFIGURABLE I/Os P0[7:0] CONFIGURABLE I/Os PROGRAMMABLE OSCILLATOR DIVIDER XTAL1 CRYSTAL OR RESONATOR XTAL2 Fig 2. Block diagram (P89LPC9241/9251) P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ HIGH PERFORMANCE ACCELERATED 2-CLOCK 80C51 CPU 4 kB/8 kB CODE FLASH internal bus 256-BYTE DATA RAM ...
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... NXP Semiconductors 5. Functional diagram KBI0 KBI1 KBI2 KBI3 KBI4 KBI5 KBI6 KBI7 CLKOUT Fig 3. Functional diagram (P89LPC9201/9211/922A1) KBI0 AD10 KBI1 AD11 KBI2 AD12 KBI3 DAC1 AD13 KBI4 KBI5 KBI6 KBI7 CLKOUT Fig 4. Functional diagram (P89LPC9241/9251) P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241 CMP2 ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 5. Fig 6. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ P0.0/CMP2/KBI0 1 P1 P1.6 4 P1.5/RST P89LPC9241/9251 P3.1/XTAL1 6 P3.0/XTAL2/CLKOUT 7 8 P1.4/INT1 9 P1.3/INT0/SDA P1.2/T0/SCL 10 P89LPC9241/9251 TSSOP20 pin configuration P0.0/CMP2/KBI0 1 2 P1.7 3 P1.6 P1.5/RST P89LPC9201/9211/ P3.1/XTAL1 6 7 P3.0/XTAL2/CLKOUT 8 P1.4/INT1 P1.3/INT0/SDA 9 P1.2/T0/SCL 10 P89LPC9201/9211/922A1 TSSOP20 pin configuration All information provided in this document is subject to legal disclaimers. Rev. 2 — ...
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... NXP Semiconductors Fig 7. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ P89LPC922A1 P0.0/CMP2/KBI0 1 2 P1.7 3 P1.6 4 P1.5/RST P3.1/XTAL1 P3.0/XTAL2/CLKOUT 7 P1.4/INT1 8 P1.3/INT0/SDA 9 P1.2/T0/SCL 10 P89LPC922A1 DIP20 pin configuration All information provided in this document is subject to legal disclaimers. Rev. 2 — 1 December 2010 8-bit microcontroller with 8-bit ADC 20 P0.1/CIN2B/KBI1 19 P0 ...
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... NXP Semiconductors 6.2 Pin description Table 3. Pin description Symbol Pin TSSOP20, DIP20 P0.0 to P0.7 P0.0/CMP2/ 1 KBI0 P0.1/CIN2B/ 20 KBI1/AD10 P0.2/CIN2A/ 19 KBI2/AD11 P0.3/CIN1B/ 18 KBI3/AD12 P0.4/CIN1A/ 17 KBI4/DAC1/AD13 P0.5/CMPREF/ 16 KBI5 P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Type Description I/O Port 0: Port 8-bit I/O port with a user-configurable output type. During reset Port 0 latches are configured in the input only mode with the internal pull-up disabled ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin TSSOP20, DIP20 P0.6/CMP1/KBI6 14 P0.7/T1/KBI7 13 P1.0 to P1.7 P1.0/TXD 12 P1.1/RXD 11 P1.2/T0/SCL 10 P1.3/INT0/SDA 9 P1.4/INT1 8 P1.5/RST 4 P1.6 3 P1.7 2 P3.0 to P3.1 P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Type Description I/O P0.6 — Port 0 bit 6. High current source. O CMP1 — Comparator 1 output. ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin TSSOP20, DIP20 P3.0/XTAL2/ 7 CLKOUT P3.1/XTAL1 [1] Input/output for P1.0 to P1.4, P1.6, P1.7. Input for P1.5. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Type Description I/O P3.0 — Port 3 bit 0. O XTAL2 — Output from the oscillator amplifier (when a crystal oscillator option is selected via the flash configuration) ...
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... NXP Semiconductors 7. Functional description Remark: Please refer to the P89LPC9201/9211/922A1/9241/9251 User manual for a more detailed functional description. 7.1 Special function registers Remark: SFR accesses are restricted in the following ways: • User must not attempt to access any SFR locations not defined. • Accesses to any defined SFR locations must be strictly for the functions for the SFRs. ...
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Table 4. Special function registers - P89LPC9201/9211/922A1 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB Bit address E7 ACC* Accumulator E0H AUXR1 Auxiliary A2H CLKLP function register Bit address ...
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Table 4. Special function registers - P89LPC9201/9211/922A1 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB FMCON Program flash E4H BUSY control (Read) Program flash E4H FMCMD.7 control (Write) FMDATA Program flash E5H ...
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Table 4. Special function registers - P89LPC9201/9211/922A1 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB IP0H Interrupt B7H - priority 0 high Bit address FF IP1* Interrupt F8H - priority 1 IP1H ...
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Table 4. Special function registers - P89LPC9201/9211/922A1 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB PCON Power control 87H SMOD1 register PCONA Power control B5H RTCPD register A Bit address D7 PSW* ...
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Table 4. Special function registers - P89LPC9201/9211/922A1 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB Bit address 8F TCON* Timer 0 and 1 88H TF1 control TH0 Timer 0 high 8CH TH1 ...
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Table 5. Extended special function registers - P89LPC9201/9211/922A1 Name Description SFR Bit functions and addresses addr. BODCFG BOD FFC8H configuration register CLKCON CLOCK Control FFDEH CLKOK register RTCDATH Real-time clock FFBFH data register high RTCDATL Real-time clock FFBEH data register ...
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Table 6. Special function registers - P89LPC9241/9251 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB Bit address E7 ACC* Accumulator E0H ADCON0 A/D control 8EH ENBI0 register 0 ADCON1 A/D control 97H ...
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Table 6. Special function registers - P89LPC9241/9251 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB AD1DAT1 A/D_0 data D6H register 1 AD1DAT2 A/D_0 data D7H register 2 AD1DAT3 A/D_0 data F5H register ...
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Table 6. Special function registers - P89LPC9241/9251 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB FMADRH Program flash E7H address high FMADRL Program flash E6H address low FMCON Program flash E4H BUSY ...
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Table 6. Special function registers - P89LPC9241/9251 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB Bit address BF IP0* Interrupt B8H - priority 0 IP0H Interrupt B7H - priority 0 high Bit ...
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Table 6. Special function registers - P89LPC9241/9251 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB P3M1 Port 3 output B1H - mode 1 P3M2 Port 3 output B2H - mode 2 PCON ...
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Table 6. Special function registers - P89LPC9241/9251 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB SP Stack pointer 81H TAMOD Timer 0 and 1 8FH - auxiliary mode Bit address 8F TCON* ...
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Table 7. Extended special function registers - P89LPC9241/9251 Name Description SFR Bit functions and addresses addr. BODCFG BOD FFC8H configuration register CLKCON CLOCK Control FFDEH CLKOK register TPSCON Temperature FFCAH sensor control register RTCDATH Real-time clock FFBFH data register high ...
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... NXP Semiconductors 7.2 Enhanced CPU The P89LPC9201/9211/922A1/9241/9251 uses an enhanced 80C51 CPU which runs at six times the speed of standard 80C51 devices. A machine cycle consists of two CPU clock cycles, and most instructions execute in one or two machine cycles. 7.3 Clocks 7.3.1 Clock definitions The P89LPC9201/9211/922A1/9241/9251 device has several internal clocks as defined below: OSCCLK — ...
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... NXP Semiconductors 7.5 Clock output The P89LPC9201/9211/922A1/9241/9251 supports a user-selectable clock output function on the P3.0/XTAL2/CLKOUT pin when crystal oscillator is not being used. This condition occurs if another clock source has been selected (on-chip RC oscillator, watchdog oscillator, external clock input on XTAL1) and if the RTC and WDT are not using the crystal oscillator as their clock source ...
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... NXP Semiconductors HIGH FREQUENCY XTAL1 MEDIUM FREQUENCY XTAL2 LOW FREQUENCY RC OSCILLATOR WITH CLOCK DOUBLER (7.3728 MHz/14.7456 MHz ± WATCHDOG OSCILLATOR (400 kHz ± Fig 8. Block diagram of oscillator control 7.10 CCLK wake-up delay The P89LPC9201/9211/922A1/9241/9251 has an internal wake-up timer that delays the clock until it stabilizes depending on the clock source used ...
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... NXP Semiconductors 7.13 Memory organization The various P89LPC9201/9211/922A1/9241/9251 memory spaces are as follows: • DATA 128 bytes of internal data memory space (00H:7FH) accessed via direct or indirect addressing, using instructions other than MOVX and MOVC. All or part of the Stack may be in this area. ...
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... NXP Semiconductors If requests of the same priority level are pending at the start of an instruction, an internal polling sequence determines which request is serviced. This is called the arbitration ranking. Note that the arbitration ranking is only used to resolve pending requests of the same priority level. 7.15.1 External interrupt inputs The P89LPC9201/9211/922A1/9241/9251 has two external interrupt inputs as well as the Keypad Interrupt function ...
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... NXP Semiconductors RTCF ERTC (RTCCON.1) WDOVF (1) ENADCI0 (1) ADCI0 (1) ENADCI1 (1) ADCI1 (1) ENBI0 (1) BNDI0 (1) ENBI1 (1) BNDI1 (1) EAD (1) P89LPC9241/9251. Fig 9. Interrupt sources, interrupt enables, and power-down wake-up sources P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ IE0 EX0 IE1 EX1 BOIF EBO KBIF EKBI EWDRT CMF2 CMF1 EC EA (IE0 ...
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... NXP Semiconductors 7.16 I/O ports The P89LPC9201/9211/922A1/9241/9251 has four I/O ports: Port 0, Port 1 and Port 3. Ports 0 and 1 are 8-bit ports, and Port 2-bit port. The exact number of I/O pins available depends upon the clock and reset options chosen, as shown in Table 9. Clock source ...
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... NXP Semiconductors An open-drain port pin has a Schmitt trigger input that also has a glitch suppression circuit. 7.16.1.3 Input-only configuration The input-only port configuration has no output drivers Schmitt trigger input that also has a glitch suppression circuit. 7.16.1.4 Push-pull output configuration The push-pull output configuration has the same pull-down structure as both the open-drain and the quasi-bidirectional output modes, but provides a continuous strong pull-up when the port latch contains a logic 1 ...
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... NXP Semiconductors 7.17.1 Brownout detection The brownout detect function determines if the power supply voltage drops below a certain level. Enhanced brownout detection has 3 independent functions: BOD reset, BOD interrupt and BOD FLASH. BOD reset is always on except in total Power-down mode. It could not be disabled in software ...
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... NXP Semiconductors Some chip functions continue to operate and draw power during Power-down mode, increasing the total power used during power-down. These include: Brownout detect, watchdog timer, comparators (note that comparators can be powered down separately), and RTC/system timer. The internal RC oscillator is disabled unless both the RC oscillator has been selected as the system clock and the RTC is enabled ...
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... NXP Semiconductors 7.19.1 Reset vector Following reset, the P89LPC9201/9211/922A1/9241/9251 will fetch instructions from either address 0000H or the Boot address. The Boot address is formed by using the boot vector as the high byte of the address and the low byte of the address = 00H. The boot address will be used if a UART break reset occurs, or the non-volatile boot status bit (BOOTSTAT ...
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... NXP Semiconductors 7.20.6 Timer overflow toggle output Timers 0 and 1 can be configured to automatically toggle a port output whenever a timer overflow occurs. The same device pins that are used for the T0 and T1 count inputs are also used for the timer toggle outputs. The port outputs will be a logic 1 prior to the first timer overflow when this mode is turned on ...
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... NXP Semiconductors 7.22.4 Mode 3 11 bits are transmitted (through TXD) or received (through RXD): a start bit (logic 0), 8 data bits (LSB first), a programmable 9 the same as Mode 2 in all respects except baud rate. The baud rate in Mode 3 is variable and is determined by the Timer 1 overflow rate or the baud rate generator (described in Section 7.22.5 “ ...
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... NXP Semiconductors 7.22.9 Transmit interrupts with double buffering enabled (modes 1, 2 and 3) Unlike the conventional UART, in double buffering mode, the TI interrupt is generated when the double buffer is ready to receive new data. th 7.22.10 The 9 If double buffering is disabled TB8 can be written before or after SBUF is written, as long as TB8 is updated some time before that bit is shifted out ...
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... NXP Semiconductors P1.3/SDA P1.2/SCL Fig 12. I 7.24 Analog comparators Two analog comparators are provided on the P89LPC9201/9211/922A1/9241/9251. Input and output options allow use of the comparators in a number of different configurations. Comparator operation is such that the output is a logical one (which may be read in a register and/or routed to a pin) when the positive input (one of two selectable inputs) is greater than the negative input (selectable from a pin or an internal reference voltage) ...
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... NXP Semiconductors The overall connections to both comparators are shown in function to V When each comparator is first enabled, the comparator output and interrupt flag are not guaranteed to be stable for 10 μs. The corresponding comparator interrupt should not be enabled during that time, and the comparator interrupt flag must be cleared before the interrupt is enabled in order to prevent an immediate interrupt service. When a comparator is disabled the comparator’ ...
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... NXP Semiconductors If a comparator interrupt is enabled (except in Total Power-down mode), a change of the comparator output state will generate an interrupt and wake-up the processor. If the comparator output to a pin is enabled, the pin should be configured in the push-pull mode in order to obtain fast switching times while in Power-down mode. The reason is that with the oscillator stopped, the temporary strong pull-up that normally occurs during switching on a quasi-bidirectional port pin does not take place ...
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... NXP Semiconductors MOV WFEED1, #0A5H MOV WFEED2, #05AH PCLK 0 0 watchdog 1 crystal oscillator 1 oscillator XTALWD WDCON (A7H) (1) Watchdog reset can also be caused by an invalid feed sequence writing to WDCON not immediately followed by a feed sequence. Fig 14. Watchdog timer in Watchdog mode (WDTE = 1) 7.27 Additional features 7 ...
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... NXP Semiconductors programming mechanisms. The P89LPC9201/9211/922A1/9241/9251 uses V supply voltage to perform the Program/Erase algorithms. When voltage supply is lower than 2.4 V, the BOD FLASH is tripped and flash erase/program is blocked. 7.28.2 Features • Programming and erase over the full operating voltage range. • Byte erase allows code memory to be used for data storage. ...
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... NXP Semiconductors 7.28.6 ICP ICP is performed without removing the microcontroller from the system. The ICP facility consists of internal hardware resources to facilitate remote programming of the P89LPC9201/9211/922A1/9241/9251 through a two-wire serial interface. The NXP ICP facility has made in-circuit programming in an embedded application - using commercially available programmers - possible with a minimum of additional expense in components and circuit board area ...
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... NXP Semiconductors Table 10 factory-provided bootloader is pre-programmed into the address space indicated and uses the indicated bootloader entry point to perform ISP functions. This code can be erased by the user. Remark: Users who wish to use this loader should take precautions to avoid erasing the 1 kB sector that contains this bootloader. Instead, the page erase function can be used to erase the first eight 64-byte pages located in this sector ...
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... NXP Semiconductors temperature. The temperature sensor is measured through Anin03. Anin00, Anin01 and Anin02 are unused. A block diagram of the ADC is shown in diagram”. The ADC consists of an 4-input multiplexer which feeds a sample-and-hold circuit providing an input signal to comparator inputs. The control logic in combination with the SAR drives a digital-to-analog converter which provides the other input to the comparator ...
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... NXP Semiconductors 8.3 Block diagram 2:1 MUX V ref(bg) V sen AD10 AD11 AD12 AD13 Fig 15. ADC block diagram 8.4 Temperature sensor An on-chip wide-temperature range temperature sensor is integrated. It provides temperature sensing capability of −40 ° °C. ADC0 is dedicated for the temperature sensor, and the temperature sensor is measured through Anin03. To get an accurate ...
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... NXP Semiconductors 8.5.3 Auto scan, single conversion mode Any combination of the four input channels can be selected for conversion. A single conversion of each selected input will be performed and the result placed in the result register which corresponds to the selected input channel. An interrupt, if enabled, will be generated after all selected channels have been converted ...
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... NXP Semiconductors 8.7 Boundary limits interrupt Each of the A/D converters has both a high and low boundary limit register. The user may select whether an interrupt is generated when the conversion result is within (or equal to) the high and low boundary limits or when the conversion result is outside the boundary limits ...
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... NXP Semiconductors 9. Limiting values Table 11. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter T bias ambient temperature amb(bias) T storage temperature stg I HIGH-level output current per OH(I/O) input/output pin I LOW-level output current per OL(I/O) input/output pin I maximum total input/output current ...
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... NXP Semiconductors 10. Static characteristics Table 12. Static characteristics 3.6 V unless otherwise specified. DD − ° ° +85 C for industrial applications, unless otherwise specified. amb Symbol Parameter I operating supply current DD(oper) I Idle mode supply current DD(idle) I Power-down mode supply DD(pd) current I total Power-down mode ...
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... NXP Semiconductors Table 12. Static characteristics 3.6 V unless otherwise specified. DD − ° ° +85 C for industrial applications, unless otherwise specified. amb Symbol Parameter R internal pull-up resistance RST_N(int) on pin RST V band gap reference voltage ref(bg) TC band gap temperature bg coefficient [1] Typical ratings are not guaranteed. The values listed are at room temperature ...
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... NXP Semiconductors 10.1 Current characteristics Note: The graphs provided are a statistical summary based on a limited number of samples and only for information purposes. The performance characteristics listed are not tested or guaranteed. (mA) Fig 17. I (mA) Fig 18. I P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241 2.4 2.8 Test conditions: normal mode, code while(1) {} executed from on-chip flash ...
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... NXP Semiconductors (mA) Fig 19. I (mA) Fig 20. I P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241 2.4 2.8 Test conditions: normal mode, code while(1) {} executed from on-chip flash; using an external clock. vs. frequency at +85 °C DD(oper) 5 4.0 3.0 2.0 1.0 0.0 2.4 2.8 Test conditions: Idle mode entered executing code from on-chip flash; using an external clock with no active peripherals, with the following functions disabled: real-time clock and watchdog timer. vs. frequency at +25 ° ...
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... NXP Semiconductors (mA) Fig 21. I (mA) Fig 22. I P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ 5 4.0 3.0 2.0 1.0 0.0 2.4 2.8 Test conditions: Idle mode entered executing code from on-chip flash; using an external clock with no active peripherals, with the following functions disabled: real-time clock and watchdog timer. ...
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... NXP Semiconductors (μA) (1) +85 °C (2) +25 °C (3) −40 °C Fig 23. I (μA) (1) +85 °C (2) −40 °C (3) +25 °C Fig 24. I P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ 20 18.0 16.0 14.0 12.0 10.0 2.4 2.8 Test conditions: Power-down mode, using internal RC oscillator with the following functions disabled: comparators, real-time clock, and watchdog timer ...
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... NXP Semiconductors 10.2 Internal RC/watchdog oscillator characteristics Note: The graphs provided are a statistical summary based on a limited number of samples and only for information purposes. The performance characteristics listed are not tested or guaranteed. frequency deviation (%) Fig 25. Average internal RC oscillator frequency vs. V frequency ...
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... NXP Semiconductors frequency deviation (%) Fig 27. Average internal RC oscillator frequency vs. V frequency deviation (%) Fig 28. Average watchdog oscillator frequency vs. V P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ 0.2 0 −0.2 −0.4 −0.6 2.4 2.8 Central frequency of internal RC oscillator = 7.3728 MHz 2.5 1.5 0.5 −0.5 −1.5 2.4 2 ...
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... NXP Semiconductors frequency deviation (%) Fig 29. Average watchdog oscillator frequency vs. V frequency deviation (%) Fig 30. Average watchdog oscillator frequency vs. V P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ 0.5 −0.5 −1.5 −2.5 −3.5 2.4 2.8 Central frequency of watchdog oscillator = 400 kHz 1.5 0.5 −0.5 −1.5 −2.5 2 ...
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... NXP Semiconductors 10.3 BOD characteristics Table 13. BOD static characteristics 3.6 V unless otherwise specified. DD − ° ° +85 C for industrial applications, unless otherwise specified. amb Symbol Parameter BOD interrupt V trip voltage trip BOD reset V trip voltage trip BOD EEPROM/FLASH V trip voltage ...
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... NXP Semiconductors 11. Dynamic characteristics Table 14. Dynamic characteristics (12 MHz 2 3.6 V unless otherwise specified. DD − ° ° +85 C for industrial applications, unless otherwise specified. amb Symbol Parameter f internal RC oscillator osc(RC) frequency f internal watchdog osc(WD) oscillator frequency f oscillator frequency osc T clock cycle time cy(clk) ...
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... NXP Semiconductors Table 15. Dynamic characteristics (18 MHz 3 3.6 V unless otherwise specified. DD − ° ° +85 C for industrial applications, unless otherwise specified. amb Symbol Parameter f internal RC oscillator osc(RC) frequency f internal watchdog osc(WD) oscillator frequency f oscillator frequency osc T clock cycle time cy(clk) f low-power select clock ...
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... NXP Semiconductors 11.1 Waveforms clock t QVXH output data write to SBUF t XHDV input data clear RI Fig 32. Shift register mode timing Fig 33. External clock timing (with an amplitude of at least V 11.2 ISP entry mode Table 16. Dynamic characteristics, ISP entry mode 3.6 V, unless otherwise specified. ...
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... NXP Semiconductors 12. Other characteristics 12.1 Comparator electrical characteristics Table 17. Comparator electrical characteristics 3.6 V, unless otherwise specified. DD − ° ° +85 C for industrial applications, unless otherwise specified. amb Symbol Parameter V input offset voltage IO V common-mode input voltage IC CMRR common-mode rejection ratio ...
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... NXP Semiconductors 12.2 ADC/temperature sensor electrical characteristics Table 18. ADC/temperature sensor electrical characteristics 3.6 V, unless otherwise specified. DD − ° ° +85 C for industrial applications, unless otherwise specified. amb All limits valid for an external source impedance of less than 10 k Symbol Parameter V ADC analog supply voltage ...
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... NXP Semiconductors 255 254 253 252 7 code out offset error E O (1) Example of an actual transfer curve. (2) The ideal transfer curve. Fig 36. ADC characteristics P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ (2) 1 LSB (ideal (LSB ) IA ideal All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors 13. Package outline TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors DIP20: plastic dual in-line package; 20 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...
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... NXP Semiconductors 14. Abbreviations Table 19. Acronym ADC BOD CPU CRC DAC EPROM EEPROM EMI PLL PWM RAM RC RTC SAR SFR UART WDT P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Abbreviations Description Analog-to-Digital Converter Brownout Detection Central Processing Unit Cyclic Redundancy Check Digital-to-Analog Converter Erasable Programmable Read-Only Memory ...
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... NXP Semiconductors 15. Revision history Table 20. Revision history Document ID Release date P89LPC92X v.2 20101201 • Modifications: Table • Table • Section • Section • Changed data sheet status to Product. P89LPC92X v.1 20090416 P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Data sheet status Product data sheet 11: Updated table ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 2.1 Principal features . . . . . . . . . . . . . . . . . . . . . . . 1 2.2 Additional features . . . . . . . . . . . . . . . . . . . . . . 2 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 3.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 6 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 7 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 9 7 Functional description . . . . . . . . . . . . . . . . . . 12 7.1 Special function registers . . . . . . . . . . . . . . . . 12 7 ...
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... NXP Semiconductors 8.1 General description . . . . . . . . . . . . . . . . . . . . 46 8.2 Features and benefits . . . . . . . . . . . . . . . . . . . 47 8.3 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . 48 8.4 Temperature sensor . . . . . . . . . . . . . . . . . . . . 48 8.5 ADC operating modes . . . . . . . . . . . . . . . . . . 48 8.5.1 Fixed channel, single conversion mode . . . . . 48 8.5.2 Fixed channel, continuous conversion mode . 48 8.5.3 Auto scan, single conversion mode . . . . . . . . 49 8.5.4 Auto scan, continuous conversion mode . . . . 49 8 ...