P89LPC982FDH,529 NXP Semiconductors, P89LPC982FDH,529 Datasheet
P89LPC982FDH,529
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P89LPC980/982/983/985 8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB/8 kB wide-voltage byte-erasable flash with 10-bit ADC Rev. 4 — 15 June 2010 1. General description The P89LPC980/982/983/985 is a single-chip microcontroller, available in low cost packages, based on a ...
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... NXP Semiconductors 2.2 Additional features A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns for all instructions except multiply and divide when executing at 18 MHz. This is six times the performance of the standard 80C51 running at the same clock frequency. A lower clock frequency for the same performance results in power savings and reduced EMI ...
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... NXP Semiconductors 3. Ordering information Table 1. Type number P89LPC980FDH P89LPC982FA P89LPC982FDH P89LPC983FDH P89LPC985FA P89LPC985FDH 3.1 Ordering options Table 2. Type number P89LPC980FDH P89LPC982FA P89LPC982FDH P89LPC983FDH P89LPC985FA P89LPC985FDH P89LPC980_982_983_985 Product data sheet P89LPC980/982/983/985 8-bit microcontroller with accelerated two-clock 80C51 core Ordering information Package Name ...
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... NXP Semiconductors 4. Block diagram P89LPC980/982 P3[1:0] P2[7:0] P1[7:0] P0[7:0] XTAL1 CRYSTAL OR RESONATOR XTAL2 Fig 1. P89LPC980/982 block diagram P89LPC980_982_983_985 Product data sheet P89LPC980/982/983/985 8-bit microcontroller with accelerated two-clock 80C51 core ACCELERATED 2-CLOCK 80C51 CPU 8 kB/4 kB CODE FLASH internal bus 256-BYTE DATA RAM ...
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... NXP Semiconductors P89LPC983/985 P3[1:0] P2[7:0] P1[7:0] P0[7:0] XTAL1 CRYSTAL OR RESONATOR XTAL2 (1) Only on the P89LPC985. Fig 2. P89LPC983/985 block diagram P89LPC980_982_983_985 Product data sheet P89LPC980/982/983/985 8-bit microcontroller with accelerated two-clock 80C51 core ACCELERATED 2-CLOCK 80C51 CPU 8 kB/4 kB CODE FLASH internal bus 256-BYTE DATA RAM ...
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... NXP Semiconductors 5. Functional diagram (1) SPICLK KBI0 KBI1 KBI2 T2 KBI3 KBI4 T3 KBI5 CMPREF KBI6 KBI7 CLKOUT (1) For pin remap Fig 3. P89LPC980/982 Functional diagram (1) (2) SPICLK AD05 KBI0 AD00 KBI1 AD01 KBI2 T2 AD02 KBI3 AD03 KBI4 T3 KBI5 KBI6 KBI7 CLKOUT (1) For pin remap (2) Only on the P89LPC985 Fig 4 ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 5. Fig 6. P89LPC980_982_983_985 Product data sheet P89LPC980/982/983/985 8-bit microcontroller with accelerated two-clock 80C51 core P2.0/TXD 1 P2.1/RXD 2 3 P0.0/CMP2/KBI0/SPICLK 4 P1.7/T3EX/MOSI P1.6/MISO 5 P1.5/RST P3.1/XTAL1 9 P3.0/XTAL2/CLKOUT 10 P1.4/INT1/T4EX/SS P1.3/INT0/SDA/T4 11 P1.2/T0/SCL 12 13 P2.2/MOSI 14 P2.3/MISO P89LPC980/982 TSSOP28 pin configuration P2.0/AD07/TXD 1 P2.1/AD06/RXD ...
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... NXP Semiconductors Fig 7. P89LPC980_982_983_985 Product data sheet P89LPC980/982/983/985 8-bit microcontroller with accelerated two-clock 80C51 core 5 P1.6/MISO 6 P1.5/RST P3.1/XTAL1 8 P89LPC982 P3.0/XTAL2/CLKOUT 9 10 P1.4/INT1/T4EX/SS 11 P1.3/INT0/SDA/T4 P89LPC982 PLCC28 pin configuration Rev. 4 — 15 June 2010 25 P0.2/CIN2A/KBI2 24 P0.3/CIN1B/KBI3/T2 23 P0.4/CIN1A/KBI4 22 P0.5/CMPREF/KBI5/ P0.6/CMP1/KBI6 19 P0.7/T1/KBI7 002aae538 © NXP B.V. 2010. All rights reserved. ...
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... NXP Semiconductors Fig 8. P89LPC980_982_983_985 Product data sheet P89LPC980/982/983/985 8-bit microcontroller with accelerated two-clock 80C51 core P1.6/MISO 5 P1.5/RST P3.1/XTAL1 P89LPC985 P3.0/XTAL2/CLKOUT 9 P1.4/INT1/T4EX/SS 10 P1.3/INT0/SDA/T4 11 P89LPC985 PLCC28 pin configuration Rev. 4 — 15 June 2010 25 P0.2/CIN2A/KBI2/AD01 24 P0.3/CIN1B/KBI3/AD02/T2 23 P0.4/CIN1A/KBI4/AD03 22 P0.5/CMPREF/KBI5/ P0.6/CMP1/KBI6 19 P0.7/T1/KBI7 002aae539 © NXP B.V. 2010. All rights reserved. ...
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... NXP Semiconductors 6.2 Pin description Table 3. Pin description Symbol Pin PLCC28, TSSOP28 P0.0 to P0.7 P0.0/CMP2/KBI0/ 3 AD05/SPICLK P0.1/CIN2B/ 26 KBI1/AD00 P0.2/CIN2A/ 25 KBI2/AD01 P0.3/CIN1B/ 24 KBI3/AD02/T2 P0.4/CIN1A/ 23 KBI4/AD03 P0.5/CMPREF/ 22 KBI5/T3 P89LPC980_982_983_985 Product data sheet 8-bit microcontroller with accelerated two-clock 80C51 core Type Description I/O Port 0: Port 8-bit I/O port with a user-configurable output type. During reset Port 0 latches are configured in the input only mode with the internal pull-up disabled ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin PLCC28, TSSOP28 P0.6/CMP1/KBI6 20 P0.7/KBI7/T1 19 P1.0 to P1.7 P1.0/TXD 18 P1.1/RXD/T2EX 17 P1.2/SCL/T0 12 P1.3/INT0/SDA P1.4/INT1/T4EX P1.5/RST 6 P1.6/MISO 5 P89LPC980_982_983_985 Product data sheet 8-bit microcontroller with accelerated two-clock 80C51 core Type Description I/O P0.6 — Port 0 bit 6. High current source. ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin PLCC28, TSSOP28 P1.7/AD04/T3EX/ 4 MOSI P2.0 to P2.7 P2.0/AD07/TXD 1 P2.1/AD06/RXD 2 P2.2/MOSI 13 P2.3/MISO 14 P2.4/SS 15 P2.5/SPICLK 16 P2.6/SCL 27 P2.7/SDA 28 P3.0 to P3.1 P89LPC980_982_983_985 Product data sheet 8-bit microcontroller with accelerated two-clock 80C51 core Type Description I/O P1.7 — Port 1 bit 7. High current source. ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin PLCC28, TSSOP28 P3.0/XTAL2/ 9 CLKOUT P3.1/XTAL1 [1] Input/output for P1.0 to P1.4, P1.6, P1.7. Input for P1.5. P89LPC980_982_983_985 Product data sheet 8-bit microcontroller with accelerated two-clock 80C51 core Type Description I/O P3.0 — Port 3 bit 0. O XTAL2 — Output from the oscillator amplifier (when a crystal oscillator option is selected via the flash configuration ...
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... NXP Semiconductors 7. Functional description Remark: Please refer to the P89LPC980/982/983/985 User manual for a more detailed functional description. 7.1 Special function registers Remark: SFR accesses are restricted in the following ways: • User must not attempt to access any SFR locations not defined. • Accesses to any defined SFR locations must be strictly for the functions for the SFRs. ...
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Table 4. Special function registers - P89LPC980/982 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB Bit address E7 ACC* Accumulator E0H AUXR1 Auxiliary function A2H CLKLP register Bit address ...
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Table 4. Special function registers - P89LPC980/982 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB FMCON Program flash E4H BUSY control (Read) Program flash E4H FMCMD.7 FMCMD.6 FMCMD.5 FMCMD.4 FMCMD.3 FMCMD.2 FMCMD.1 ...
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Table 4. Special function registers - P89LPC980/982 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB IP1H Interrupt priority 1 F7H - high KBCON Keypad control 94H - register KBMASK Keypad interrupt 86H ...
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Table 4. Special function registers - P89LPC980/982 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB P3M1 Port 3 output B1H - mode 1 P3M2 Port 3 output B2H - mode 2 PCON ...
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Table 4. Special function registers - P89LPC980/982 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB PWMD4L PWM Free Cycle ABH Register 4 Low Byte RCAP2H Capture Register FCH 2 High Byte RCAP2L ...
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Table 4. Special function registers - P89LPC980/982 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB SPCTL SPI control E2H SSIG register SPSTAT SPI status E1H SPIF register SPDAT SPI data register E3H ...
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Table 4. Special function registers - P89LPC980/982 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB TL4 Timer/Counter 4 CBH Low Byte TINTF Timer/Counters CEH - 2/3/4 Overflow and External Flags TRIM Internal ...
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Table 5. Extended special function registers - P89LPC980/982 Name Description SFR Bit functions and addresses addr. MSB BODCFG BOD FFC8H - configuration register CLKCON CLOCK Control FFDEH CLKOK register CMPREF Comparator FFCBH - reference register RTCDATH Real-time clock FFBFH data ...
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Table 6. Special function registers - P89LPC983/985 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB Bit address E7 ACC* Accumulator E0H AD0CON A/D control 97H ENBI0 register 0 AD0INS A/D input select ...
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Table 6. Special function registers - P89LPC983/985 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB DPL Data pointer low 82H FMADRH Program flash E7H address high FMADRL Program flash E6H address low ...
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Table 6. Special function registers - P89LPC983/985 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB Bit address BF IP0* Interrupt priority B8H - 0 IP0H Interrupt priority B7H - 0 high Bit ...
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Table 6. Special function registers - P89LPC983/985 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB P1M2 Port 1 output 92H (P1M2.7) mode 2 P2M1 Port 2 output A4H (P2M1.7) mode 1 P2M2 ...
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Table 6. Special function registers - P89LPC983/985 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB PWMD3L PWM Free EAH Cycle Register 3 Low Byte PWMD4H PWM Free AAH Cycle Register 4 High ...
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Table 6. Special function registers - P89LPC983/985 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB SADEN Serial port B9H address enable SBUF Serial Port data 99H buffer register Bit address 9F SCON* ...
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Table 6. Special function registers - P89LPC983/985 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB TH3 Timer/Counter 3 EEH High Byte TL3 Timer/Counter 3 EDH Low Byte T4CON Timer/Counter 2 CDH PSEL4 ...
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Table 7. Extended special function registers - P89LPC983/985 Name Description SFR addr. Bit functions and addresses MSB AD0DAT0L ADC0 data FFFFH register 0, left (MSB) AD0DAT0R ADC0 data FFFEH register 0, right (LSB) AD0DAT1L ADC0 data FFFDH register 1, left ...
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Table 7. Extended special function registers - P89LPC983/985 Name Description SFR addr. Bit functions and addresses MSB AD0DAT6L ADC0 data FFF3H register 6, left (MSB) AD0DAT6R ADC0 data FFF2H register 6, right (LSB) AD0DAT7L ADC0 data FFF1H register 7, left ...
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Table 7. Extended special function registers - P89LPC983/985 Name Description SFR addr. Bit functions and addresses MSB CMPREF Comparator FFCBH - reference register RTCDATH Real-time FFBFH clock data register high RTCDATL Real-time FFBEH clock data register low [1] Extended SFRs ...
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... NXP Semiconductors 7.2 Enhanced CPU The P89LPC980/982/983/985 uses an enhanced 80C51 CPU which runs at six times the speed of standard 80C51 devices. A machine cycle consists of two CPU clock cycles, and most instructions execute in one or two machine cycles. 7.3 Clocks 7.3.1 Clock definitions The P89LPC980/982/983/985 device has several internal clocks as defined below: OSCCLK — ...
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... NXP Semiconductors 7.5 Clock output The P89LPC980/982/983/985 supports a user-selectable clock output function on the P3.0/XTAL2/CLKOUT pin when crystal oscillator is not being used. This condition occurs if another clock source has been selected (on-chip RC oscillator, watchdog oscillator, external clock input on XTAL1) and if the RTC and WDT are not using the crystal oscillator as their clock source ...
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... NXP Semiconductors HIGH FREQUENCY XTAL1 MEDIUM FREQUENCY XTAL2 LOW FREQUENCY RC OSCILLATOR WITH CLOCK DOUBLER (7.3728 MHz/14.7456 MHz ± WATCHDOG OSCILLATOR (400 kHz/25 kHz) (1) ± 400 kHz. Fig 9. Block diagram of oscillator control 7.10 CCLK wake-up delay The P89LPC980/982/983/985 has an internal wake-up timer that delays the clock until it stabilizes depending on the clock source used ...
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... NXP Semiconductors 7.13 Memory organization The various P89LPC980/982/983/985 memory spaces are as follows: • DATA 128 bytes of internal data memory space (00H:7FH) accessed via direct or indirect addressing, using instructions other than MOVX and MOVC. All or part of the Stack may be in this area. ...
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... NXP Semiconductors Each interrupt source can be individually programmed to one of four priority levels by setting or clearing bits in the interrupt priority registers IP0, IP0H, IP1 and IP1H. An interrupt service routine in progress can be interrupted by a higher priority interrupt, but not by another interrupt of the same or lower priority. The highest priority interrupt service cannot be interrupted by any other interrupt source ...
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... NXP Semiconductors RTCF ERTC WDOVF TF2 EXF2 TIEN2 TF3 EXF3 TIEN3 TF4 EXF4 TIEN4 EXTIM (1) ENADCI0 (1) ADCI0 (1) ENBI0 (1) BNDI0 (1) EAD (1) P89LPC983/985. Fig 10. Interrupt sources, interrupt enables, and power-down wake-up sources P89LPC980_982_983_985 Product data sheet 8-bit microcontroller with accelerated two-clock 80C51 core ...
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... NXP Semiconductors 7.16 I/O ports The P89LPC980/982/983/985 has four I/O ports: Port 0, Port 1, Port 2 and Port 3. Ports 0, 1, and 2 are 8-bit ports, and Port 2-bit port. The exact number of I/O pins available depends upon the clock and reset options chosen, as shown in Table 9 ...
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... NXP Semiconductors 7.16.1.3 Input-only configuration The input-only port configuration has no output drivers Schmitt trigger input that also has a glitch suppression circuit. 7.16.1.4 Push-pull output configuration The push-pull output configuration has the same pull-down structure as both the open-drain and the quasi-bidirectional output modes, but provides a continuous strong pull-up when the port latch contains a logic 1 ...
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... NXP Semiconductors Please refer to P89LPC980/982/983/985 User manual for detail configurations. Table 10. Peripherals SPI I2C UART 7.17 Power management The P89LPC980/982/983/985 support a variety of power management features. Power-on detect and brownout detect are designed to prevent incorrect operation during initial power-up and power loss or reduction during operation. ...
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... NXP Semiconductors For correct activation of brownout detect, the V Please see 7.17.2 Power-on detection The Power-on detect has a function similar to the brownout detect, but is designed to work as power comes up initially to ensure that the device is reset from Power-on. The POF flag in the RSTSRC register is set to indicate an initial power-up condition. The POF flag will remain set until cleared by software ...
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... NXP Semiconductors or not. When switching back to high speed mode, first clear LPMOD bit to select high speed mode, then check HCOK bit. If HCOK bit turns to ‘1’, it means the switch was completed. 7.18 Reset The P1.5/RST pin can function as either a LOW-active reset input digital input, P1 ...
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... NXP Semiconductors 7.19 Timers/counters 0 and 1 The P89LPC980/982/983/985 has two general purpose counter/timers which are upward compatible with the standard 80C51 Timer 0 and Timer 1. Both can be configured to operate either as timers or event counters. An option to automatically toggle the pins upon timer overflow has been added. ...
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... NXP Semiconductors In the ‘Counter’ function, the register is incremented in response to a 1-to-0 transition at its corresponding count input pin(T2/T3 /T4). In this function, the count input is sampled once during every machine cycle. Only external Timer 2/3/4 has the external input pin TxEX ( 4). A 1-to-0 transition on this pin can trigger a reload or capture event ...
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... NXP Semiconductors automatic address recognition, selectable double buffering and several interrupt options. The UART can be operated in four modes: shift register, 8-bit UART, 9-bit UART, and CPU clock/32 or CPU clock/16. 7.22.1 Mode 0 Serial data enters and exits through RXD. TXD outputs the shift clock. 8 bits are transmitted or received, LSB first ...
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... NXP Semiconductors 7.22.6 Framing error Framing error is reported in the status register (SSTAT). In addition, if SMOD0 (PCON.6) is logic 1, framing errors can be made available in SCON.7 respectively. If SMOD0 is logic 0, SCON.7 is SM0 recommended that SM0 and SM1 (SCON.7:6) are set up when SMOD0 is logic 0. 7.22.7 Break detect Break detect is reported in the status register (SSTAT) ...
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... NXP Semiconductors • The I A typical I device provides a byte-oriented I 400 kHz. Fig 12. I P89LPC980_982_983_985 Product data sheet P89LPC980/982/983/985 8-bit microcontroller with accelerated two-clock 80C51 core 2 C-bus may be used for test and diagnostic purposes. 2 C-bus configuration is shown in 2 C-bus interface that supports data transfers up to ...
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... NXP Semiconductors P1.3/SDA P1.2/SCL Fig 13. I P89LPC980_982_983_985 Product data sheet P89LPC980/982/983/985 8-bit microcontroller with accelerated two-clock 80C51 core P1.3 INPUT FILTER OUTPUT STAGE INPUT FILTER OUTPUT STAGE timer 1 overflow P1.2 I2CON I2SCLH I2SCLL status bus I2STAT 2 C-bus serial interface block diagram Rev. 4 — ...
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... NXP Semiconductors 7.24 SPI The P89LPC980/982/983/985 provides another high-speed serial communication interface: the SPI interface. SPI is a full-duplex, high-speed, synchronous communication bus with two operation modes: Master mode and Slave mode Mbit/s can be supported in either Master mode or Slave mode. It has a Transfer Completion Flag and Write Collision Flag Protection ...
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... NXP Semiconductors 7.24.1 Typical SPI configurations Fig 15. SPI single master single slave configuration Fig 16. SPI dual device configuration, where either can be a master or a slave P89LPC980_982_983_985 Product data sheet P89LPC980/982/983/985 8-bit microcontroller with accelerated two-clock 80C51 core master MISO 8-BIT SHIFT ...
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... NXP Semiconductors Fig 17. SPI single master multiple slaves configuration 7.25 Analog comparators Two analog comparators are provided on the P89LPC980/982/983/985. Input and output options allow use of the comparators in a number of different configurations. Comparator operation is such that the output is a logical one (which may be read in a register and/or routed to a pin) when the positive input (one of two selectable pins) is greater than the negative input (selectable from a pin or an internal reference voltage) ...
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... NXP Semiconductors (P0.4) CIN1A (P0.3) CIN1B (P0.5) CMPREF (1) V ref(cmp) (P0.2) CIN2A (P0.1) CIN2B (1) See Section 7.25.1 for more details. Fig 18. Comparator input and output connections 7.25.1 Selectable internal reference voltage An internal reference voltage generator may be used to supply a default reference when a single comparator input pin is used ...
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... NXP Semiconductors 7.26 KBI The Keypad Interrupt function (KBI) is intended primarily to allow a single interrupt to be generated when Port 0 is equal to or not equal to a certain pattern. This function can be used for bus address recognition or keypad recognition. The port can be configured via SFRs for different tasks ...
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... NXP Semiconductors MOV WFEED1, #0A5H MOV WFEED2, #05AH 400 kHz PCLK 0 0 oscillator 1 25 kHz crystal 1 watchdog oscillator oscillator oscillator WDMOD (CLKCON.5) (1) Watchdog reset can also be caused by an invalid feed sequence writing to WDCON not immediately followed by a feed sequence. Fig 19. Watchdog timer in Watchdog mode (WDTE = 1) 7 ...
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... NXP Semiconductors optimize the erase and programming mechanisms. The P89LPC980/982/983/985 uses V as the supply voltage to perform the Program/Erase algorithms. When voltage supply DD is lower than 2.4 V, the BOD flash is tripped and flash erase/program is blocked. 7.29.2 Features • Programming and erase over the full operating voltage range. ...
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... NXP Semiconductors 7.29.6 ICP ICP is performed without removing the microcontroller from the system. The ICP facility consists of internal hardware resources to facilitate remote programming of the P89LPC980/982/983/985 through a two-wire serial interface. The NXP ICP facility has made in-circuit programming in an embedded application - using commercially available programmers - possible with a minimum of additional expense in components and circuit board area ...
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... NXP Semiconductors Remark: Users who wish to use this loader should take precautions to avoid erasing the 1 kB sector that contains this bootloader. Instead, the page erase function can be used to erase the first eight 64-byte pages located in this sector. A custom bootloader can be written with the Boot Vector set to the custom bootloader, if desired ...
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... NXP Semiconductors The ADC consists of an 8-input multiplexer which feeds a sample-and-hold circuit providing an input signal to comparator inputs. The control logic in combination with the SAR drives a digital-to-analog converter which provides the other input to the comparator. The output of the comparator is fed to the SAR. ...
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... NXP Semiconductors 8.3 Block diagram AD00 AD01 AD02 AD03 (1) AD04 (1) AD05 (1) AD06 (1) AD07 (1) Only on the P89LPC985. Fig 20. ADC block diagram 8.4 ADC operating modes 8.4.1 Fixed channel, single conversion mode A single input channel can be selected for conversion. A single conversion will be performed and the result placed in the result register pair which corresponds to the selected input channel ...
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... NXP Semiconductors 8.4.4 Auto scan, continuous conversion mode Any combination of the eight input channels can be selected for conversion. A conversion of each selected input will be performed and the result placed in the result register pair which corresponds to the selected input channel. The user may select whether an interrupt, if enabled, will be generated after either the first four conversions have occurred or all selected channels have been converted ...
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... NXP Semiconductors 8.6 Boundary limits interrupt The ADC has both a high and low boundary limit register. The user may select whether an interrupt is generated when the conversion result is within (or equal to) the high and low boundary limits or when the conversion result is outside the boundary limits. An interrupt will be generated, if enabled, if the result meets the selected interrupt criteria ...
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... NXP Semiconductors 9. Limiting values Table 12. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter T bias ambient temperature amb(bias) T storage temperature stg I HIGH-level output current per OH(I/O) input/output pin I LOW-level output current per OL(I/O) input/output pin I maximum total input/output current ...
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... NXP Semiconductors system frequency (MHz 2.4 Fig 21. Frequency vs. supply voltage P89LPC980_982_983_985 Product data sheet 8-bit microcontroller with accelerated two-clock 80C51 core 2.7 3.0 3.3 3.6 Rev. 4 — 15 June 2010 P89LPC980/982/983/985 V (V) DD 5.5 002aaf005 © NXP B.V. 2010. All rights reserved ...
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... NXP Semiconductors 10. Static characteristics Table 13. Static characteristics 5.5 V unless otherwise specified. DD − ° ° +85 C for industrial applications, unless otherwise specified. amb Symbol Parameter I operating supply DD(oper) current I Idle mode supply DD(idle) current I Power-down mode DD(pd) supply current P89LPC980_982_983_985 Product data sheet ...
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... NXP Semiconductors Table 13. Static characteristics 5.5 V unless otherwise specified. DD − ° ° +85 C for industrial applications, unless otherwise specified. amb Symbol Parameter I total Power-down DD(tpd) mode supply current (dV/dt) rise rate r V power-on reset POR voltage V data retention supply DDR ...
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... NXP Semiconductors Table 13. Static characteristics 5.5 V unless otherwise specified. DD − ° ° +85 C for industrial applications, unless otherwise specified. amb Symbol Parameter V trip voltage trip P89LPC980_982_983_985 Product data sheet P89LPC980/982/983/985 8-bit microcontroller with accelerated two-clock 80C51 core …continued Conditions falling stage ...
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... NXP Semiconductors Table 13. Static characteristics 5.5 V unless otherwise specified. DD − ° ° +85 C for industrial applications, unless otherwise specified. amb Symbol Parameter BOD reset V trip voltage trip BOD flash V trip voltage trip V band gap reference ref(bg) voltage TC band gap bg temperature ...
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... NXP Semiconductors 11. Dynamic characteristics Table 14. Dynamic characteristics (12 MHz 2 5.5 V unless otherwise specified. DD − ° ° +85 C for industrial applications, unless otherwise specified. amb Symbol Parameter f internal RC oscillator osc(RC) frequency f internal watchdog osc(WD) oscillator frequency f oscillator frequency osc T clock cycle time cy(clk) ...
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... NXP Semiconductors Table 14. Dynamic characteristics (12 MHz 2 5.5 V unless otherwise specified. DD − ° ° +85 C for industrial applications, unless otherwise specified. amb Symbol Parameter T SPI cycle time SPICYC slave master t SPI enable lead time SPILEAD slave t SPI enable lag time SPILAG slave ...
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... NXP Semiconductors Table 15. Dynamic characteristics (18 MHz 3 5.5 V unless otherwise specified. DD − ° ° +85 C for industrial applications, unless otherwise specified. amb Symbol Parameter f internal RC oscillator osc(RC) frequency f internal watchdog osc(WD) oscillator frequency f oscillator frequency osc T clock cycle time cy(clk) f low-power select clock ...
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... NXP Semiconductors Table 15. Dynamic characteristics (18 MHz 3 5.5 V unless otherwise specified. DD − ° ° +85 C for industrial applications, unless otherwise specified. amb Symbol Parameter t SPI enable lead time SPILEAD slave t SPI enable lag time SPILAG slave t SPICLK HIGH time SPICLKH slave master ...
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... NXP Semiconductors 11.1 Waveforms Fig 22. External clock timing (with an amplitude of at least V clock t QVXH output data write to SBUF t XHDV input data clear RI Fig 23. Shift register mode timing SS SPICLK (CPOL = 0) (output) SPICLK (CPOL = 1) (output) MISO (input) t MOSI SPIF (output) Fig 24. SPI master timing (CPHA = 0) ...
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... NXP Semiconductors SS SPICLK (CPOL = 0) (output) SPICLK (CPOL = 1) (output) MISO (input) t SPIF MOSI (output) Fig 25. SPI master timing (CPHA = SPIF t SPILEAD SPICLK (CPOL = 0) (input) t SPICLK (CPOL = 1) (input) t SPIA MISO (output) t SPIDSU MOSI (input) Fig 26. SPI slave timing (CPHA = 0) P89LPC980_982_983_985 Product data sheet ...
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... NXP Semiconductors SS t SPIF t SPILEAD SPICLK (CPOL = 0) (input) t SPIF SPICLK (CPOL = 1) (input) t SPIOH t SPIDV t SPIA MISO not defined (output) MOSI (input) Fig 27. SPI slave timing (CPHA = 1) 11.2 ISP entry mode Table 16. Dynamic characteristics, ISP entry mode 5.5 V, unless otherwise specified. ...
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... NXP Semiconductors 12. Other characteristics 12.1 Comparator electrical characteristics Table 17. Comparator electrical characteristics 5.5 V, unless otherwise specified. DD − ° ° +85 C for industrial applications, unless otherwise specified. amb Symbol Parameter V input offset voltage IO V common-mode input voltage IC CMRR common-mode rejection ratio ...
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... NXP Semiconductors 12.2 ADC electrical characteristics Table 18. ADC electrical characteristics 5.5 V, unless otherwise specified. DD − ° ° +85 C for industrial applications, unless otherwise specified. amb All limits valid for an external source impedance of less than 10 k Symbol Parameter V ADC analog supply voltage ...
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... NXP Semiconductors 13. Package outline TSSOP28: plastic thin shrink small outline package; 28 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors PLCC28: plastic leaded chip carrier; 28 leads pin 1 index 4 β DIMENSIONS (mm dimensions are derived from the original inch dimensions UNIT max. min. 4.57 0.53 mm 0.51 0.25 3.05 4.19 0.33 0.180 0.021 inches 0.02 0.01 0.12 0.165 0.013 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...
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... NXP Semiconductors 14. Abbreviations Table 19. Acronym ADC BOD CPU CCU CRC DAC EPROM EEPROM EMI GPIO LSB MSB PLL PWM RAM RC RTC SAR SFR SPI UART WDT P89LPC980_982_983_985 Product data sheet P89LPC980/982/983/985 8-bit microcontroller with accelerated two-clock 80C51 core Abbreviations Description Analog to Digital Converter ...
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... NXP Semiconductors 15. Revision history Table 20. Revision history Document ID P89LPC980_982_983_985 v.4 Modifications: P89LPC980_982_983_985_3 Modifications: P89LPC980_982_983_985_2 Modifications: P89LPC980_982_1 P89LPC980_982_983_985 Product data sheet 8-bit microcontroller with accelerated two-clock 80C51 core Release date Data sheet status 20100615 Product data sheet • Section 7.4 “Crystal oscillator option” on page • ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... Product data sheet P89LPC980/982/983/985 8-bit microcontroller with accelerated two-clock 80C51 core own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 2.1 Principal features . . . . . . . . . . . . . . . . . . . . . . . 1 2.2 Additional features . . . . . . . . . . . . . . . . . . . . . . 2 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 3.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 6 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 7 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . 10 7 Functional description . . . . . . . . . . . . . . . . . . 14 7.1 Special function registers . . . . . . . . . . . . . . . . 14 7 ...
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... NXP Semiconductors 7.29.4 Using flash as data storage . . . . . . . . . . . . . . 56 7.29.5 Flash programming and erasing . . . . . . . . . . . 56 7.29.6 ICP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 7.29.7 IAP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 7.29.8 ISP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 7.29.9 Power-on reset code execution . . . . . . . . . . . 57 7.29.10 Hardware activation of the bootloader . . . . . . 58 7.30 User configuration bytes . . . . . . . . . . . . . . . . . 58 7.31 User sector security bytes . . . . . . . . . . . . . . . 58 8 ADC (P89LPC983/985 8.1 General description ...