P89LV51RD2FA,512 NXP Semiconductors, P89LV51RD2FA,512 Datasheet - Page 57

• Manufacturer Part Number: P89LV51RD2FA,512
• Description: IC 80C51 MCU 1024 RAM 44PLCC
• Manufacturer: NXP Semiconductors
• Series: 89LVr

Specifications of P89LV51RD2FA,512

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 33MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Processor Series: P89LV5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, UART
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Package: 44PLCC
• Device Core: 80C51
• Family Name: 89LV
• Maximum Speed: 40 MHz
• For Use With: 622-1017 - BOARD 44-ZIF PLCC SOCKET622-1008 - BOARD FOR LPC9103 10-HVSON
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 935274176512; P89LV51RD2FA; P89LV51RD2FA

NXP Semiconductors
P89LV51RB2_RC2_RD2_5
Product data sheet
Table 45.
Table 46.
Bit addressable; reset value: 00H.
Table 47.
Table 48.
Bit addressable; reset value: 00H.
Table 49.
Table 50.
Not bit addressable; reset value: 00H.
Bit
7
6
5
4
3
2
1
0
Bit
7 to 4
3
2 to 0
Bit
7
6
5
4
3
2
1
0
Bit
Symbol
Bit
Symbol
Bit
Symbol
IEN0 - Interrupt enable register 0 (address A8H) bit descriptions
IEN1 - Interrupt enable register 1 (address E8H) bit allocation
IEN1 - Interrupt enable register 1 (address E8H) bit descriptions
IP0 - Interrupt priority 0 low register (address B8H) bit allocation
IP0 - Interrupt priority 0 low register (address B8H) bit descriptions
IP0H - Interrupt priority 0 high register (address B7H) bit allocation
Symbol
EA
EC
ET2
ES
ET1
EX1
ET0
EX0
Symbol
-
EBO
-
Symbol
-
PPC
PT2
PS
PT1
PX1
PT0
PX0
7
7
7
-
-
-
Rev. 05 — 15 December 2009
PPCH
PPC
6
6
6
-
Description
Interrupt Enable Bit: EA = 1 interrupt(s) can be serviced, EA = 0
interrupt servicing disabled.
PCA Interrupt Enable bit.
Timer 2 Interrupt Enable.
Serial Port Interrupt Enable.
Timer 1 Overflow Interrupt Enable.
External Interrupt 1 Enable.
Timer 0 Overflow Interrupt Enable.
External Interrupt 0 Enable.
Description
Reserved for future use. Should be set to ‘0’ by user programs.
Brownout Interrupt Enable. 1 = enable, 0 = disable.
Reserved for future use. Should be set to ‘0’ by user programs.
Description
Reserved for future use. Should be set to ‘0’ by user programs.
PCA interrupt priority LOW bit.
Timer 2 interrupt priority LOW bit.
Serial Port interrupt priority LOW bit.
Timer 1 interrupt priority LOW bit.
External interrupt 1 priority LOW bit.
Timer 0 interrupt priority LOW bit.
External interrupt 0 priority LOW bit.
PT2H
PT2
5
5
5
-
P89LV51RB2/RC2/RD2
PSH
PS
4
4
4
-
8-bit microcontrollers with 80C51 core
PT1H
EBO
PT1
3
3
3
PX1H
PX1
2
2
2
-
© NXP B.V. 2009. All rights reserved.
PT0H
PT0
1
1
1
-
PX0H
PX0
57 of 76
0
0
0
-