P89LV51RD2FA,512 NXP Semiconductors, P89LV51RD2FA,512 Datasheet - Page 76

IC 80C51 MCU 1024 RAM 44PLCC

P89LV51RD2FA,512

Manufacturer Part Number
P89LV51RD2FA,512
Description
IC 80C51 MCU 1024 RAM 44PLCC
Manufacturer
NXP Semiconductors
Series
89LVr
Datasheet

Specifications of P89LV51RD2FA,512

Core Processor
8051
Core Size
8-Bit
Speed
33MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Processor Series
P89LV5x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, UART
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.4 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Package
44PLCC
Device Core
80C51
Family Name
89LV
Maximum Speed
40 MHz
For Use With
622-1017 - BOARD 44-ZIF PLCC SOCKET622-1008 - BOARD FOR LPC9103 10-HVSON
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
935274176512
P89LV51RD2FA
P89LV51RD2FA

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P89LV51RD2FA,512
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
P89LV51RD2FA,512
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
15. Contents
1
2
3
3.1
4
5
5.1
5.2
6
6.1
6.2
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
6.2.6
6.2.7
6.2.8
6.3
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.4
6.4.1
6.4.2
6.4.3
6.4.4
6.5
6.5.1
6.5.2
6.5.3
6.5.4
6.5.5
6.6
6.6.1
6.6.2
6.6.3
6.6.4
6.6.5
6.6.6
6.6.7
6.6.8
6.6.9
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . 10
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6
Special function registers . . . . . . . . . . . . . . . . 10
Memory organization . . . . . . . . . . . . . . . . . . . 14
Flash program memory bank selection. . . . . . 14
Power-on reset code execution. . . . . . . . . . . . 14
Software reset. . . . . . . . . . . . . . . . . . . . . . . . . 15
Brownout detect reset. . . . . . . . . . . . . . . . . . . 15
Watchdog reset. . . . . . . . . . . . . . . . . . . . . . . . 16
Data RAM memory . . . . . . . . . . . . . . . . . . . . . 16
Expanded data RAM addressing . . . . . . . . . . 16
Dual data pointers. . . . . . . . . . . . . . . . . . . . . . 19
Flash memory IAP . . . . . . . . . . . . . . . . . . . . . 20
Flash organization . . . . . . . . . . . . . . . . . . . . . 20
Boot block (block 1) . . . . . . . . . . . . . . . . . . . . 20
ISP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Using ISP . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Using the serial number . . . . . . . . . . . . . . . . . 25
IAP method . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Timers/counters 0 and 1 . . . . . . . . . . . . . . . . . 27
Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Timer 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Capture mode . . . . . . . . . . . . . . . . . . . . . . . . . 32
Auto-reload mode (up or down counter) . . . . . 33
Programmable clock-out . . . . . . . . . . . . . . . . . 35
Baud rate generator mode . . . . . . . . . . . . . . . 35
Summary of baud rate equations . . . . . . . . . . 37
UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Framing error . . . . . . . . . . . . . . . . . . . . . . . . . 39
More about UART mode 1 . . . . . . . . . . . . . . . 39
More about UART modes 2 and 3 . . . . . . . . . 39
Multiprocessor communications . . . . . . . . . . . 40
Automatic address recognition . . . . . . . . . . . . 40
6.7
6.7.1
6.7.2
6.8
6.9
6.9.1
6.9.2
6.9.3
6.9.4
6.9.5
6.10
6.11
6.12
6.12.1
6.12.2
6.13
6.13.1
6.13.2
7
8
9
9.1
10
11
12
13
13.1
13.2
13.3
13.4
14
15
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
P89LV51RB2/RC2/RD2
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 62
Static characteristics . . . . . . . . . . . . . . . . . . . 62
Dynamic characteristics . . . . . . . . . . . . . . . . . 65
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 71
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 73
Revision history . . . . . . . . . . . . . . . . . . . . . . . 74
Legal information . . . . . . . . . . . . . . . . . . . . . . 75
Contact information . . . . . . . . . . . . . . . . . . . . 75
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
SPI features . . . . . . . . . . . . . . . . . . . . . . . . . . 42
SPI description . . . . . . . . . . . . . . . . . . . . . . . . 42
Watchdog timer . . . . . . . . . . . . . . . . . . . . . . . 45
PCA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
PCA capture mode. . . . . . . . . . . . . . . . . . . . . 50
16-bit software timer mode. . . . . . . . . . . . . . . 51
High-speed output mode . . . . . . . . . . . . . . . . 52
PWM mode . . . . . . . . . . . . . . . . . . . . . . . . . . 53
PCA watchdog timer . . . . . . . . . . . . . . . . . . . 54
Security bit . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Interrupt priority and polling sequence . . . . . . 55
Power-saving modes . . . . . . . . . . . . . . . . . . . 58
Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Power-down mode . . . . . . . . . . . . . . . . . . . . . 59
System clock and clock options . . . . . . . . . . . 60
Clock input options and recommended
capacitor values for oscillator . . . . . . . . . . . . . 60
Clock doubling option . . . . . . . . . . . . . . . . . . . 60
Explanation of symbols . . . . . . . . . . . . . . . . . 66
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 75
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 75
8-bit microcontrollers with 80C51 core
Document identifier: P89LV51RB2_RC2_RD2_5
Date of release: 15 December 2009
All rights reserved.

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