LPC3152FET208,551 NXP Semiconductors, LPC3152FET208,551 Datasheet - Page 14

• Manufacturer Part Number: LPC3152FET208,551
• Description: IC ARM9 MCU USB OTG 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC3000r

Specifications of LPC3152FET208,551

• Package / Case: 208-TFBGA
• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, PCM, SPI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, PWM, WDT
• Number Of I /o: 10
• Program Memory Type: ROMless
• Ram Size: 192K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 3x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC31
• Core: ARM926EJS
• Data Bus Width: 32 bit
• Data Ram Size: 192 KB
• Interface Type: I2C, I2S, SPI, UART
• Maximum Clock Frequency: 180 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: OM11029
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935287561551

NXP Semiconductors
Table 5:
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Table 6:
LPC3152_3154
Preliminary data sheet
Supply
domain
SUP1
SUP2
SUP3
SUP4
SUP5
SUP6
SUP7
SUP8
I/O pad name Type
DIO1
DIO2
DIO3
DIO4
IICC
IICD
AIO1
AIO2
AIO3
CS1
CS2
When the SDRAM is used, the supply voltage of the NAND flash, SDRAM, and the LCD interface must be the same, i.e. SUP4 and
SUP8 should be connected to the same rail. (See also
Voltage range
1.0 V to 1.3 V
1.4 V or 1.8 V
2.7 V to 3.6 V
1.65 V to 1.95 V (in 1.8 V mode)
2.5 V to 3.6 V (in 3.3 V mode)
4.5 V to 5.5 V
3.2 V to 4.2 V
1.8 V
1.65 V to 1.95 V (in 1.8 V mode)
2.5 V to 3.6 V (in 3.3 V mode)
Supply domains
Cell types
bspts3chp
bpts5pcph
bpts5pcph1v8
mem1
bsptz40pchp
iic3m4scl
iic3mvsda
apio3v3
apio
apiot5v
vddco
vddi
Function
Digital input/output
Digital input/output
Digital input/output
Digital input/output
Digital input/output
Digital input/output
Analog input/output Analog cell; analog input/output; protection to external 3.3 V
Analog input/output Analog pad; analog input/output.
Analog input/output Analog cell; analog input/output; 5 V tolerant pad-based ESD
Core supply
Core supply
All information provided in this document is subject to legal disclaimers.
Related supply pins
VDDI, VDDA12,
USB_VDDA12_PLL, VPP (read)
VDDI_AD, ADC_VDDA18
VDDE_IOC, VDDE_IOD,
ADC10B_VDDA33,
ADC_VDDA33, DAC_VDDA33,
HP_VDDA33,
USB_VDDA33_DRV,
USB_VDDA33, VPP (write)
VDDE_IOA
PSU_VBUS, CHARGE_VBUS,
UOS_VBUS, USB_VBUS
RTC_VDD36, PSU_VBAT1,
PSU_VBAT2, PSU_VBAT
RTC_BACKUP
VDDE_IOB
Rev. 0.12 — 27 May 2010
Section
Description
Bidirectional 3.3 V; 3-state output; 3 ns slew rate control; plain
input; CMOS with hysteresis; programmable pull-up, pull-down,
repeater.
Bidirectional 5 V; plain input; 3-state output; CMOS with
programmable hysteresis; programmable pull-up, pull-down,
repeater.
Bidirectional 1.8 V; plain input; 3-state output; CMOS with
programmable hysteresis; programmable pull-up, pull-down,
repeater.
Bidirectional 1.8 or 3.3 V; plain input; 3-state output; CMOS with
programmable hysteresis; programmable pull-up, pull-down,
repeater.
I
I
supply rail.
protection.
-
-
2
2
C-bus; clock signal; cell based ESD protection.
C-bus; data signal; cell based ESD protection.
6.28.3.).
Description
Digital core supply
Digital core supply for the analog die
functions
Peripheral supply
Peripheral supply for NAND flash interface
USB VBUS voltage
Li-ion battery voltage
Real-time clock voltage domain (generated
internally from SUP6)
Peripheral supply for
SDRAM/SRAM/bus-based LCD
LPC3152/3154
© NXP B.V. 2010. All rights reserved.
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