LPC3152FET208,551 NXP Semiconductors, LPC3152FET208,551 Datasheet - Page 28

IC ARM9 MCU USB OTG 208TFBGA

LPC3152FET208,551

Manufacturer Part Number
LPC3152FET208,551
Description
IC ARM9 MCU USB OTG 208TFBGA
Manufacturer
NXP Semiconductors
Series
LPC3000r
Datasheet

Specifications of LPC3152FET208,551

Package / Case
208-TFBGA
Core Processor
ARM9
Core Size
32-Bit
Speed
180MHz
Connectivity
EBI/EMI, I²C, IrDA, MMC, PCM, SPI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, PWM, WDT
Number Of I /o
10
Program Memory Type
ROMless
Ram Size
192K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 3x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC31
Core
ARM926EJS
Data Bus Width
32 bit
Data Ram Size
192 KB
Interface Type
I2C, I2S, SPI, UART
Maximum Clock Frequency
180 MHz
Number Of Timers
5
Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
OM11029
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
935287561551

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC3152FET208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
LPC3152_3154
Preliminary data sheet
Fig 6. CGU block diagram
EXTERNAL
CRYSTAL
I2SRX_BCK0
I2SRX_WS0
The LPC3152/3154 has 11 clock domains (n = 11). The number of fractional dividers depends on the clock domain.
clock resources
6.16 Watchdog Timer (WDT)
OSCILLATOR
The Watchdog Timer can be used to generate a system reset if there is a CPU/software
crash. In addition the watchdog timer can be used as an ordinary timer.
how the Watchdog Timer module is connected in the system.
This module has the following features:
Based on the input of the Watchdog timer (see also
generate a system-wide reset in the case of a system stall.
In the event of a software or hardware failure, generates a chip-wide reset request
when its programmed time-out period has expired (output m1).
Watchdog counter can be reset by a periodical software trigger.
After a reset, a register will indicate whether a reset has occurred because of a
watchdog generated reset.
Watchdog timer can also be used as a normal timer in addition to the watchdog
functionality (output m0).
All information provided in this document is subject to legal disclaimers.
Rev. 0.12 — 27 May 2010
I
2
SYSTEM
S/AUDIO
PLL
PLL
SWITCHBOX
CLOCK DOMAIN 0
CLOCK DOMAIN n
BASE
BASE
subdomain clocks
Section
FRACTIONAL
FRACTIONAL
FRACTIONAL
FRACTIONAL
LPC3152/3154
DIVIDER 0
DIVIDER 6
DIVIDER i
DIVIDER j
6.16), the CGU can
© NXP B.V. 2010. All rights reserved.
Figure 7
clock outputs
002aae385
to modules
shows
28 of 88

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