EP9307-IRZ Cirrus Logic Inc, EP9307-IRZ Datasheet - Page 236
EP9307-IRZ
Manufacturer Part Number
EP9307-IRZ
Description
IC ARM9 SOC ARM920T 272TFBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets
1.EP9307-CRZ.pdf
(16 pages)
2.EP9307-CRZ.pdf
(50 pages)
3.EP9307-CRZ.pdf
(824 pages)
4.EP9307-CRZ.pdf
(48 pages)
Specifications of EP9307-IRZ
Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
14
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
272-TFBGA
Controller Family/series
(ARM9)
No. Of I/o's
14
Ram Memory Size
32MB
Cpu Speed
200MHz
No. Of Timers
3
No. Of Pwm Channels
1
Digital Ic Case Style
TFBGA
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9307A-Z
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1133 - KIT DEVELOPMENT EP9307 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
598-1256
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP9307-IRZ
Manufacturer:
CIRRUS
Quantity:
3 468
Company:
Part Number:
EP9307-IRZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
- EP9307-CRZ PDF datasheet
- EP9307-CRZ PDF datasheet #2
- EP9307-CRZ PDF datasheet #3
- EP9307-CRZ PDF datasheet #4
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- Download datasheet (13Mb)
7
7-54
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
BLKPOL:
HSPOL:
V/CPOL:
CSYNC:
DATEN:
SYNCEN:
Copyright 2007 Cirrus Logic
1 - Pixel data output changes on falling edge of the clock
on the SPCLK pin
Blank Polarity - Read/Write
The value written to this bit selects the polarity of the
blanking signal on the BLANK pin:
0 - BLANK is active LOW (default)
1 - BLANK is active HIGH
Horizontal Sync Polarity - Read/Write
The value written to this bit selects the polarity of the
horizontal synchronization signal on the HSYNC pin:
0 - HSYNC is active LOW (default)
1 - HSYNC is active HIGH
Vertical / Composite Polarity - Read/Write
The value written to this bit selects the polarity of the
synchronization signal on the V_CSYNC pin:
0 - V_CSYNC is active LOW (default)
1 - V_CSYNC is active HIGH
Composite Sync - Read/Write
The value written to this bit selects whether the Vertical
Sync or the Composite Sync signal is routed to the
V_CSYNC pin:
0 - Vertical Sync
1 - Composite Sync
Pixel Data Enable - Read/Write
The value written to this bit selects whether pixel data is
output to the P[x] pins, or not:
0 - Pixel data output disabled
1 - Pixel data output enabled
Video Sync Enable - Read/Write
The value written to this bit selects whether
synchronization signals are output to the H_SYNC and
V_CSYNC pins, or not:
0 - Video SYNC outputs disabled
1 - Video SYNC outputs enabled
DS785UM1
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