EP9307-IRZ Cirrus Logic Inc, EP9307-IRZ Datasheet - Page 624
EP9307-IRZ
Manufacturer Part Number
EP9307-IRZ
Description
IC ARM9 SOC ARM920T 272TFBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets
1.EP9307-CRZ.pdf
(16 pages)
2.EP9307-CRZ.pdf
(50 pages)
3.EP9307-CRZ.pdf
(824 pages)
4.EP9307-CRZ.pdf
(48 pages)
Specifications of EP9307-IRZ
Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
14
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
272-TFBGA
Controller Family/series
(ARM9)
No. Of I/o's
14
Ram Memory Size
32MB
Cpu Speed
200MHz
No. Of Timers
3
No. Of Pwm Channels
1
Digital Ic Case Style
TFBGA
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9307A-Z
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1133 - KIT DEVELOPMENT EP9307 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
598-1256
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP9307-IRZ
Manufacturer:
CIRRUS
Quantity:
3 468
Company:
Part Number:
EP9307-IRZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
- EP9307-CRZ PDF datasheet
- EP9307-CRZ PDF datasheet #2
- EP9307-CRZ PDF datasheet #3
- EP9307-CRZ PDF datasheet #4
- Current page: 624 of 824
- Download datasheet (13Mb)
17
IrDataTail
17-28
IrDA
EP93xx User’s Guide
31
15
Bit Descriptions:
Address:
Default:
Definition:
Bit Descriptions:
30
14
29
13
28
12
DATA:
0x808B_0014, 0x808B_0018, 0x808B_001C - Write Only
0x0000_0000
IrDA Data Tail Register. This is a 24-bit write only register used for transmitting
frames whose payload data is not an integer multiple of 4 bytes long. The bit
locations are cleared when read by the transmit logic or when the TXE control
bit is clear. The IrData Tail register may be written using one of three
addresses. Bits two and three of the address determine how many bytes
within the word are significant, that is, are intended for transmission. If none of
the address is written, the register remains marked as empty and payload data
will be read by the transmit logic from the 32-bit FIFO only. The status of this
register does not affect the TFS flag, nor does it cause interrupts or DMA
requests to be generated.
RSVD:
DATA:
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
IrDA data word. Values written and sent to the transmit
FIFO. Values read are from the receiver FIFO.
Reserved. Unknown During Read.
IrDA transmit payload data. Write to address 0x014, least
significant byte is transmitted. Write to address 0x018,
least significant two bytes are transmitted. Write to
address 0x01C, least significant three bytes are
transmitted.
24
8
DATA
DATA
23
7
22
6
21
5
20
4
19
3
18
2
17
1
DS785UM1
16
0
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