EP9312-IB Cirrus Logic Inc, EP9312-IB Datasheet - Page 774
EP9312-IB
Manufacturer Part Number
EP9312-IB
Description
IC ARM920T MCU 200MHZ 352-PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets
1.EP9307-CRZ.pdf
(824 pages)
2.EP9312-IBZ.pdf
(4 pages)
3.EP9312-CB.pdf
(62 pages)
4.EP9312-CB.pdf
(17 pages)
Specifications of EP9312-IB
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
352-BGA
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Other names
598-1259
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP9312-IBZ
Manufacturer:
CIRRUS
Quantity:
30
Company:
Part Number:
EP9312-IBZ
Manufacturer:
HITTITE
Quantity:
1 200
- EP9307-CRZ PDF datasheet
- EP9312-IBZ PDF datasheet #2
- EP9312-CB PDF datasheet #3
- EP9312-CB PDF datasheet #4
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27
27-4
IDE Interface
EP93xx User’s Guide
27.2.3 MDMA Operations
For a Write Operation.
Minimum total cycle time for the various PIO modes is as follows:
You must also setup IDECFG and WST as follows, according to the PIO mode:
For MDMA operations, DMA commands are set up using PIO operations by the host. The
registers IDEMDMADataOut and IDEMDMADataIn act as the 1-deep buffer for write and
read operations respectively. The state machine sets up the necessary signals including the
DMA request to the DMA controller.
1. Write out the register value.
2. Delay as follows, based on the PIO mode.
3. Bring DIOWn high.
4. Delay as follows, based on the PIO mode.
5. Bring DIOWn low.
6. Delay as follows, based on the PIO mode before the next read or write can occur.
PIO Mode 0 - 600 ns
PIO Mode 1 - 383 ns
PIO Mode 2 - 330 ns
PIO Mode 3 - 180 ns
PIO Mode 4 - 120 ns
PIO Mode 0 - Delay for 30 ns
PIO Mode 1 - Delay for 20 ns
PIO Mode 2 - Delay for 15 ns
PIO Mode 3 - Delay for 10 ns
PIO Mode 4 - Delay for 5 ns
PIO Mode 0 - Delay for 70 ns.
PIO Mode 1 - Delay for 50 ns.
PIO Mode 2 - Delay for 30 ns
PIO Mode 3 - Delay for 30 ns
PIO Mode 4 - Delay for 25 ns
PIO Mode 0 - Delay for 290 ns.
PIO Mode 1 - Delay for 290 ns
PIO Mode 2 - Delay for 290 ns
PIO Mode 3 - Delay for 80 ns
PIO Mode 4 - Delay for 70 ns
PIO Mode 0 - 240 ns.
PIO Mode 1 - 50 ns
PIO Mode 2 - 20 ns
PIO Mode 3 - 70 ns
PIO Mode 4 - 25 ns
Copyright 2007 Cirrus Logic
DS785UM1
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