Z8F012ASB020SG Zilog, Z8F012ASB020SG Datasheet - Page 91
Z8F012ASB020SG
Manufacturer Part Number
Z8F012ASB020SG
Description
IC ENCORE XP MCU FLASH 1K 8SOIC
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet
1.Z8F011ASB020EG.pdf
(282 pages)
Specifications of Z8F012ASB020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
6
Program Memory Size
1KB (1K x 8)
Program Memory Type
FLASH
Eeprom Size
16 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
Z8F012Ax
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
Z8F04A08100KITG, Z8F04A28100KITG, ZENETSC0100ZACG, ZENETSC0100ZACG, ZUSBOPTSC01ZACG, ZUSBSC00100ZAC, ZUSBSC00100ZACG
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4039
Z8F012ASB020SG
Z8F012ASB020SG
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- Download datasheet (4Mb)
PS022825-0908
Follow the steps below for configuring a timer for COMPARE mode and initiating the
count:
1. Write to the Timer Control register to:
2. Write to the Timer High and Low Byte registers to set the starting count value.
3. Write to the Timer Reload High and Low Byte registers to set the Compare value.
4. Enable the timer interrupt, if appropriate, and set the timer interrupt priority by writing
5. If using the Timer Output function, configure the associated GPIO port pin for the
6. Write to the Timer Control register to enable the timer and initiate counting.
In COMPARE mode, the system clock always provides the timer input. The Compare time
can be calculated by the following equation:
GATED Mode
In GATED mode, the timer counts only when the Timer Input signal is in its active state
(asserted), as determined by the TPOL bit in the Timer Control register. When the Timer
Input signal is asserted, counting begins. A timer interrupt is generated when the Timer
Input signal is deasserted or a timer reload occurs. To determine if a Timer Input signal
deassertion generated the interrupt, read the associated GPIO input value and compare to
the value stored in the TPOL bit.
The timer counts up to the 16-bit Reload value stored in the Timer Reload High and Low
Byte registers. The timer input is the system clock. When reaching the Reload value, the
timer generates an interrupt, the count value in the Timer High and Low Byte registers is
reset to
Also, if the Timer Output alternate function is enabled, the Timer Output pin changes state
(from Low to High or from High to Low) at timer reset.
Follow the steps below for configuring a timer for GATED mode and initiating the count:
1. Write to the Timer Control register to:
–
–
–
–
to the relevant interrupt registers.
Timer Output alternate function.
–
–
–
COMPARE Mode Time (s)
0001H
Disable the timer.
Configure the timer for COMPARE mode.
Set the prescale value.
Set the initial logic level (High or Low) for the Timer Output alternate function, if
appropriate.
Disable the timer.
Configure the timer for GATED mode.
Set the prescale value.
and counting resumes (assuming the Timer Input signal remains asserted).
=
(
-----------------------------------------------------------------------------------------------------
Compare Value Start Value
System Clock Frequency (Hz)
–
Z8 Encore! XP
Product Specification
)
×
Prescale
®
F082A Series
Timers
80
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