W78E052DDG Nuvoton Technology Corporation of America, W78E052DDG Datasheet - Page 22

• Manufacturer Part Number: W78E052DDG
• Description: IC MCU 8-BIT 8K FLASH 40-DIP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: W78r

Specifications of W78E052DDG

• Core Processor: 8052
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: EBI/EMI, UART/USART
• Peripherals: POR, WDT
• Number Of I /o: 36
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

Timer Mode Control
Mnemonic: TMOD
4
3
2
1
0
BIT
Bit:
7
6
5
4
3
2
1
0
M1
0
0
1
1
TR0
IE1
IT1
IE0
IT0
NAME
GATE
M1
M0
GATE
M1
M0
7
GATE
TIMER1
C/
C/
M0
T
T
0
1
0
1
MODE
Mode 0: 13-bit timer/counter TLx serves as 5-bit pre-scale.
Mode 1: 16-bit timer/counter, no pre-scale.
Mode 2: 8-bit timer/counter with auto-reload from THx.
Mode 3: (Timer 0) TL0 is an 8-bit timer/counter controlled by the standard Timer0
control bits. TH0 is an 8-bit timer only controlled by Timer1 control bits. (Timer 1)
Timer 0 Run Control. This bit is set or cleared by software to turn timer/counter on
or off.
Interrupt 1 Edge Detect Flag: Set by hardware when an edge/level is detected on
the interrupt was edge triggered. Otherwise it follows the inverse of the pin.
Interrupt 1 Type Control. Set/cleared by software to specify falling edge/ low level
triggered external inputs.
Interrupt 0 Edge Detect Flag. Set by hardware when an edge/level is detected
on
only if the interrupt was edge triggered. Otherwise it follows the inverse of the pin.
Interrupt 0 Type Control: Set/cleared by software to specify falling edge/ low level
triggered external inputs.
FUNCTION
INT . This bit is cleared by hardware when the service routine is vectored to only if
Gating control: When this bit is set, Timer/counter 1 is enabled only while the
pin is high and the TR1 control bit is set. When cleared, the
and Timer 1 is enabled whenever TR1 control bit is set.
Timer or Counter Select: When clear, Timer 1 is incremented by the internal clock.
When set, the timer counts falling edges on the T1 pin.
Timer 1 mode select bit 1. See table below.
Timer 1 mode select bit 0. See table below.
Gating control: When this bit is set, Timer/counter 0 is enabled only while the
pin is high and the TR0 control bit is set. When cleared, the
and Timer 0 is enabled whenever TR0 control bit is set.
Timer or Counter Select: When clear, Timer 0 is incremented by the internal clock.
When set, the timer counts falling edges on the T0 pin.
Timer 0 mode select bit 1. See table below.
Timer 0 mode select bit 0. See table below.
6
C/
INT . This bit is cleared by hardware when the service routine is vectored to
1
T
0
5
M1
M1, M0: Mode Select bits:
W78E054D/W78E052D/W78E051D Data Sheet
4
M0
- 22 -
3
GATE
TIMER0
2
C/
T
INT pin has no effect,
INT pin has no effect,
1
M1
0
1
Address: 89h
0
M0
INT
INT
0
1