W78E052DDG Nuvoton Technology Corporation of America, W78E052DDG Datasheet - Page 49

no-image

W78E052DDG

Manufacturer Part Number
W78E052DDG
Description
IC MCU 8-BIT 8K FLASH 40-DIP
Manufacturer
Nuvoton Technology Corporation of America
Series
W78r
Datasheet

Specifications of W78E052DDG

Core Processor
8052
Core Size
8-Bit
Speed
40MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR, WDT
Number Of I /o
36
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
W78E052DDG
Manufacturer:
NUVOTON
Quantity:
1 000
Part Number:
W78E052DDG
Manufacturer:
Winbond
Quantity:
1 000
Part Number:
W78E052DDG
Manufacturer:
NUVOTON
Quantity:
20 000
Part Number:
W78E052DDG
Manufacturer:
NUVOTON
Quantity:
3 526
Part Number:
W78E052DDG
0
W78E054D/W78E052D/W78E051D Data Sheet
service routine currently being executed. If the polling cycle is not the last machine cycle of the instruc-
tion being executed, then an additional delay is introduced. The maximum response time (if no other
interrupt is in service) occurs if the device is performing a write to IE, IP, IPH and then executes a
MUL or DIV instruction.
13.6 Interrupt Inputs
Since the external interrupt pins are sampled once each machine cycle, an input high or low should
hold for at least one machine cycle to ensure proper sampling. If the external interrupt is high for at
least one machine cycle, and then hold it low for at least one machine cycle. This is to ensure that the
transition is seen and that interrupt request flag IEn is set. IEn is automatically cleared by the CPU
when the service routine is called.
If the external interrupt is level-activated, the external source must hold the request active until the
requested interrupt is actually generated. If the external interrupt is still asserted when the interrupt
service routine is completed another interrupt will be generated. It is not necessary to clear the inter-
rupt flag IEn when the interrupt is level sensitive, it simply tracks the input pin level.
If an external interrupt is enabled when the W78E054D/W78E052D/W78E051D is put into Power
Down or Idle mode, the interrupt will cause the processor to wake up and resume operation. Refer to
the section on Power Reduction Modes for details.
Publication Release Date: Dec 29, 2009
- 49 -
Revision A09

Related parts for W78E052DDG