W78E052DDG Nuvoton Technology Corporation of America, W78E052DDG Datasheet - Page 50

• Manufacturer Part Number: W78E052DDG
• Description: IC MCU 8-BIT 8K FLASH 40-DIP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: W78r

Specifications of W78E052DDG

• Core Processor: 8052
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: EBI/EMI, UART/USART
• Peripherals: POR, WDT
• Number Of I /o: 36
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

14 PROGRAMMABLE TIMERS/COUNTERS
The W78E054D/W78E052D/W78E051D series have Three 16-bit programmable timer/counters. A
machine cycle equals 12 or 6 oscillator periods, and it depends on 12T mode or 6T mode that the user
configured this device.
14.1 Timer/Counters 0 & 1
has two 8 bit registers which form the 16 bit counting register. For Timer/Counter 0 they are TH0, the
upper 8 bits register, and TL0, the lower 8 bit register. Similarly Timer/Counter 1 has two 8 bit regis-
ters, TH1 and TL1. The two can be configured to operate either as timers, counting machine cycles or
as counters counting external inputs.
When configured as a "Timer", the timer counts clock cycles. The timer clock can be programmed to
be thought of as 1/12 of the system clock. In the "Counter" mode, the register is incremented on the
falling edge of the external input pin, T0 in case of Timer 0, and T1 for Timer 1. The T0 and T1 inputs
are sampled in every machine cycle at C4. If the sampled value is high in one machine cycle and low
in the next, then a valid high to low transition on the pin is recognized and the count register is incre-
mented. Since it takes two machine cycles to recognize a negative transition on the pin, the maximum
rate at which counting will take place is 1/24 of the master clock frequency. In either the "Timer" or
"Counter" mode, the count register will be updated at C3. Therefore, in the "Timer" mode, the recog-
nized negative transition on pin T0 and T1 can cause the count register value to be updated only in
the machine cycle following the one in which the negative edge was detected.
The "Timer" or "Counter" function is selected by the "
Each Timer/Counter has one selection bit for its own; bit 2 of TMOD selects the function for
Timer/Counter 0 and bit 6 of TMOD selects the function for Timer/Counter 1. In addition each
Timer/Counter can be set to operate in any one of four possible modes. The mode selection is done
by bits M0 and M1 in the TMOD SFR.
14.2 Time-Base Selection
timers can be programmed to operate like the standard 8051 family, counting at the rate of 1/12 of the
clock speed. This will ensure that timing loops on W78E054D/W78E052D/W78E051D and the stan-
dard
W78E054D/W78E052D/W78E051D timers.
14.2.1 Mode 0
In Mode 0, the timer/counter is a 13-bit counter. The 13-bit counter consists of THx (8 MSB) and the
five lower bits of TLx (5 LSB). The upper three bits of TLx are ignored. The timer/counter is enabled
when TRx is set and either GATE is 0 or
cycles; when
time base be 1/12 speed, and the falling edge of the clock increments the counter. When the 13-bit
value moves from 1FFFh to 0000h, the timer overflow flag TFx is set, and an interrupt occurs if en-
abled.
14.2.2 Mode 1
Mode 1 is similar to Mode 0 except that the counting register forms a 16-bit counter, rather than a 13-
bit counter. This means that all the bits of THx and TLx are used. Roll-over occurs when the timer
moves from a count of 0FFFFh to 0000h. The timer overflow flag TFx of the relevant timer is set and if
W78E054D/W78E052D/W78E051D has two 16-bit Timer/Counters. Each of these Timer/Counters
W78E054D/W78E052D/W78E051D provides users with two modes of operation for the timer. The
8051
C/
can
T
is 1, it counts falling edges on T0 (Timer 0) or T1 (Timer 1). For clock cycles, the
be
matched.
W78E054D/W78E052D/W78E051D Data Sheet
This
INTx
is
- 50 -
is 1. When
the
C/
T
" bit in the TMOD Special Function Register.
default
C/
T
is 0, the timer/counter counts clock
mode
of
operation
of
the