W78E052DDG Nuvoton Technology Corporation of America, W78E052DDG Datasheet - Page 59

• Manufacturer Part Number: W78E052DDG
• Description: IC MCU 8-BIT 8K FLASH 40-DIP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: W78r

Specifications of W78E052DDG

• Core Processor: 8052
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: EBI/EMI, UART/USART
• Peripherals: POR, WDT
• Number Of I /o: 36
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

The 16 states of the counter effectively divide the bit time into 16 slices. The bit detection is done on a
best of three basis. The bit detector samples the RxD pin, at the 8th, 9th and 10th counter states. By
using a majority 2 of 3 voting system, the bit value is selected. This is done to improve the noise rejec-
tion feature of the serial port. If the first bit detected after the falling edge of RxD pin is not 0, then this
indicates an invalid start bit, and the reception is immediately aborted. The serial port again looks for a
falling edge in the RxD line. If a valid start bit is detected, then the rest of the bits are also detected
and shifted into the SBUF.
After shifting in 8 data bits, there is one more shift to do, after which the SBUF and RB8 are loaded
and RI is set. However certain conditions must be met before the loading and setting of RI can be
done.
If these conditions are met, then the stop bit goes to RB8, the 8 data bits go into SBUF and RI is set.
Otherwise the received frame may be lost. After the middle of the stop bit, the receiver goes back to
looking for a 1-to-0 transition on the RxD pin.
16.3 MODE 2
This mode uses a total of 11 bits in asynchronous full-duplex communication. The functional descrip-
tion is shown in the figure below. The frame consists of one start bit (0), 8 data bits (LSB first), a pro-
grammable 9th bit (TB8) and a stop bit (1). The 9th bit received is put into RB8. The baud rate is pro-
SMOD
Overflow
Timer 1
TCLK
RCLK
1/2
1. RI must be 0 and
2. Either SM2 = 0, or the received stop bit = 1.
0
0
0
1
SAMPLE
RXD
Overflow
Timer 2
1
1
DETECTOR
1-To-0
1/16
1/16
Figure 16- 2 Serial port mode 1
RX CLOCK
TX START
TX CLOCK
TX START
Write to
SBUF
W78E054D/W78E052D/W78E051D Data Sheet
DETECTOR
BIT
Controllor
Serial
- 59 -
LOAD SBUF
Data Bus
Internal
RX SHIFT
TX SHIFT
TI
RI
Receive Shift Register
1
0
CLOCK
Transmit Shift Register
SIN
Publication Release Date: Dec 29, 2009
STOP
START
PARIN
CLOCK
LOAD
PAROUT
D8
SOUT
Serial Interrupt
SBUF
RB8
TXD
Revision A09
Read SBUF
Data Bus
Internal