Z8F0822PJ020SG Zilog, Z8F0822PJ020SG Datasheet - Page 100
Z8F0822PJ020SG
Manufacturer Part Number
Z8F0822PJ020SG
Description
IC ENCORE MCU FLASH 8K 28DIP
Manufacturer
Zilog
Series
Encore!® XP®r
Specifications of Z8F0822PJ020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-DIP (0.600", 15.24mm)
Controller Family/series
Z8
No. Of I/o's
19
Ram Memory Size
1KB
Cpu Speed
20MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
Z8F082xx
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
19
Number Of Timers
2
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 5 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
269-4208
Z8F0822PJ020SG
Z8F0822PJ020SG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8F0822PJ020SG
Manufacturer:
Zilog
Quantity:
45
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PS022517-0508
Table 49. Watchdog Timer Reload Upper Byte Register (WDTU)
BITS
FIELD
RESET
R/W
ADDR
R/W*—Read returns the current WDT count value. Write sets the desired Reload Value.
Watchdog Timer Reload Upper, High and Low Byte Registers
Caution:
STOP—Stop Mode Recovery Indicator
If this bit is set to 1, a Stop Mode Recovery occurred. If the STOP and WDT bits are both
set to 1, the Stop Mode Recovery occurred due to a WDT time-out. If the STOP bit is 1
and the WDT bit is 0, the Stop Mode Recovery was not caused by a WDT time-out. This bit
is reset by a POR or a WDT time-out that occurred while not in STOP mode. Reading this
register also resets this bit.
WDT—Watchdog Timer Time-Out Indicator
If this bit is set to 1, a WDT time-out occurred. A POR resets this pin. A Stop Mode
Recovery due a change in an input pin also resets this bit. Reading this register resets
this bit.
EXT—External Reset Indicator
If this bit is set to 1, a Reset initiated by the external RESET pin occurred. A POR or a
Stop Mode Recovery from a change in an input pin resets this bit. Reading this register
resets this bit.
Reserved
These bits are reserved and must be 0.
The Watchdog Timer Reload Upper, High and Low Byte (WDTU, WDTH, WDTL)
Registers
WDT, when a WDT instruction executes. The 24-bit reload value is {WDTU[7:0],
WDTH[7:0], WDTL[7:0]}. Writing to these registers sets the required Reload Value.
Reading from these registers returns the current WDT count value.
WDTU—WDT Reload Upper Byte
Most significant byte (MSB), Bits[23:16], of the 24-bit WDT reload value.
7
The 24-bit WDT Reload Value must not be set to a value less than
000004H
(Table 49
6
.
through
5
Table
51) form the 24-bit reload value that is loaded into the
4
WDTU
FF1H
R/W*
1
3
Z8 Encore! XP
2
Product Specification
1
®
F0822 Series
Watchdog Timer
0
87
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