ST7FMC1K2T6/TR STMicroelectronics, ST7FMC1K2T6/TR Datasheet - Page 55
ST7FMC1K2T6/TR
Manufacturer Part Number
ST7FMC1K2T6/TR
Description
IC MCU 8BIT 8K FLASH 32-LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7FMC2S4T6.pdf
(309 pages)
Specifications of ST7FMC1K2T6/TR
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
LINSCI
Peripherals
LVD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Processor Series
ST7FMC1x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
17
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7MC-KIT/BLDC, ST7MDT50-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
497-8402 - BOARD EVAL COMPLETE INVERTER497-8400 - KIT IGBT PWR MODULE CTRL ST7MC497-4734 - EVAL KIT 3KW POWER DRIVER BOARD497-4733 - EVAL KIT 1KW POWER DRIVER BOARD497-4732 - EVAL KIT 300W POWER DRIVER BOARD497-4731 - EVAL KIT PWR DRIVER CONTROL BRD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST7FMC1K2T6/TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
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I/O PORTS (Cont’d)
Figure 32. I/O Port General Block Diagram
Table 10. I/O Port Mode Options
Legend: NI - not implemented
Input
Output
REGISTER
ACCESS
INTERRUPT
SOURCE (ei
EXTERNAL
DDR SEL
OR SEL
Off - implemented not activated
On - implemented and activated
DR SEL
Floating with/without Interrupt
Pull-up with/without Interrupt
Push-pull
Open Drain (logic level)
True Open Drain
Configuration Mode
DDR
x
DR
OR
)
ALTERNATE
OUTPUT
ALTERNATE
ENABLE
If implemented
1
0
1
0
Pull-Up
Off
On
Off
NI
Note: The diode to V
true open drain pads. A local protection between
the pad and V
vice against positive stress.
N-BUFFER
PULL-UP
CONDITION
P-Buffer
Off
On
Off
NI
SS
SCHMITT
TRIGGER
CMOS
is implemented to protect the de-
V
DD
DD
NI (see note)
ST7MC1xx/ST7MC2xx
to V
is not implemented in the
On
DD
P-BUFFER
(see table below)
V
Diodes
DD
DIODES
(see table below)
PULL-UP
(see table below)
ALTERNATE
ANALOG
INPUT
to V
INPUT
PAD
On
SS
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