ST72F63BK4M1 STMicroelectronics, ST72F63BK4M1 Datasheet - Page 62
![IC MCU 8BIT LS 16K 34-SOIC](/photos/12/15/121510/497-34-soic_series_sml.jpg)
ST72F63BK4M1
Manufacturer Part Number
ST72F63BK4M1
Description
IC MCU 8BIT LS 16K 34-SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST72F63BD6U1TR.pdf
(186 pages)
Specifications of ST72F63BK4M1
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
34-SOIC (7.5mm Width)
Processor Series
ST72F6x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C, SCI, USB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
27
Number Of Timers
2 x 16 bit
Operating Supply Voltage
4 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7MDTU3-EPB/US, ST72F63B-SK/RAIS, ST7MDTU3-EMU3, STX-RLINK
Minimum Operating Temperature
0 C
On-chip Adc
8 bit
For Use With
497-5521 - EVAL BOARD LOW SPEED USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
497-2115-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST72F63BK4M1
Manufacturer:
ST
Quantity:
20 000
On-chip peripherals
62/186
A minimum of four falling edges of the CPU clock must occur between two consecutive
active edges of the external clock; thus the external clock frequency must be less than a
quarter of the CPU clock frequency.
Figure 29. Counter timing diagram, internal clock divided by 2
1. The MCU is in reset state when the internal reset signal is high, when it is low the MCU is running.
Figure 30. Counter timing diagram, internal clock divided by 4
1. The MCU is in reset state when the internal reset signal is high, when it is low the MCU is running.
Figure 31. Counter timing diagram, internal clock divided by 8
1. The MCU is in reset state when the internal reset signal is high, when it is low the MCU is running.
TIMER OVERFLOW FLAG (TOF)
TIMER OVERFLOW FLAG (TOF)
TIMER OVERFLOW FLAG (TOF)
COUNTER REGISTER
COUNTER REGISTER
COUNTER REGISTER
INTERNAL RESET
INTERNAL RESET
INTERNAL RESET
TIMER CLOCK
CPU CLOCK
TIMER CLOCK
TIMER CLOCK
CPU CLOCK
CPU CLOCK
Doc ID 7516 Rev 8
FFFC
FFFC
FFFD FFFE FFFF 0000 0001 0002 0003
FFFD
FFFD
0000
0001
0000
ST7263Bxx