ST72F63BK6M1 STMicroelectronics, ST72F63BK6M1 Datasheet - Page 139
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ST72F63BK6M1
Manufacturer Part Number
ST72F63BK6M1
Description
MCU 8BIT LS USB 32KB FLSH 34SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST72F63BD6U1TR.pdf
(186 pages)
Specifications of ST72F63BK6M1
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
34-SOIC (7.5mm Width)
Processor Series
ST72F6x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SCI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
19
Number Of Timers
1
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7MDTU3-EPB/US, ST72F63B-SK/RAIS, ST7MDTU3-EMU3, STX-RLINK
Minimum Operating Temperature
0 C
On-chip Adc
8 bit, 8 Channel / 8 bit, 12 Channel
For Use With
497-8428 - BOARD EVAL CHARGER ST7260/L6924D497-5521 - EVAL BOARD LOW SPEED USB497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
497-5625-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
ST7263Bxx
13.2
Note:
Figure 53. Pin input voltage
Absolute maximum ratings
Stresses above those listed as “absolute maximum ratings” may cause permanent damage
to the device. This is a stress rating only and functional operation of the device under these
conditions is not implied. Exposure to maximum rating conditions for extended periods may
affect device reliability.
Directly connecting the RESET and I/O pins to V
unintentional internal reset is generated or an unexpected change of the I/O configuration
occurs (for example, due to a corrupted program counter). To guarantee safe operation, this
connection has to be done through a pull-up or pull-down resistor (typical: 4.7 k
RESET, 10 k
according to their reset configuration.
Table 55.
1. Directly connecting the RESET and I/O pins to V
2. I
internal reset is generated or an unexpected change of the I/O configuration occurs (for example, due to a
corrupted program counter). To guarantee safe operation, this connection has to be done through a pull-up
or pull-down resistor (typical: 4.7 kΩ for RESET, 10 kΩ for I/Os). Unused I/O pins must be tied in the same
way to VDD or VSS according to their reset configuration.
cannot be respected, the injection current must be limited externally to the I
injection is induced by V
there is no positive injection current, and the corresponding V
INJ(PIN)
V
V
Symbol
V
ESD(HBM)
DD
IN
(1)(2)
- V
must never be exceeded. This is implicitly insured if V
SS
Ω
Voltage characteristics
for I/Os). Unused I/O pins must be tied in the same way to V
Supply voltage
Input voltage on true open drain pins
Input voltage on any other pin
Electrostatic discharge voltage (Human Body
model)
IN
>V
DD
while a negative injection is induced by V
Doc ID 7516 Rev 8
V
IN
Ratings
DD
or V
SS
ST7 PIN
DD
could damage the device if an unintentional
or V
IN
IN
maximum must always be respected.
maximum is respected. If V
SS
could damage the device if an
IN
<V
INJ(PIN)
V
Section 13.7.3
Maximum value
SS
Electrical characteristics
SS
V
. For true open-drain pads,
-0.3 to V
SS-
value. A positive
0.3 to 6.0
6.0
DD
DD
IN
+0.3
or V
maximum
Ω
for
SS
139/186
Unit
V