STM32F103T8U6 STMicroelectronics, STM32F103T8U6 Datasheet - Page 91

MCU 32BIT ARM 64K FLASH 36VFQFPN

STM32F103T8U6

Manufacturer Part Number
STM32F103T8U6
Description
MCU 32BIT ARM 64K FLASH 36VFQFPN
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32F103T8U6

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
DMA, Motor Control PWM, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
26
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
36-VFQFN, 36-VFQFPN
Processor Series
STM32F103x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
20 KB
Interface Type
CAN/I2C/SPI/USART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
26
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ST-LINK
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10-ch x 12-bit)
Controller Family/series
(ARM Cortex) STM32
No. Of I/o's
26
Ram Memory Size
20KB
Cpu Speed
72MHz
No. Of Timers
4
No. Of Pwm Channels
12
Rohs Compliant
Yes
Featured Product
STM32 Cortex-M3 Companion Products
Eeprom Size
-
For Use With
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Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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STM32F103x8, STM32F103xB
Table 59.
18-Oct-2007
Date
Document revision history (continued)
Revision
3
STM32F103CBT6, STM32F103T6 and STM32F103T8 root part
numbers added (see
features and peripheral
VFQFPN36 package added (see
All packages are ECOPACK® compliant. Package mechanical data
inch values are calculated from mm and rounded to 4 decimal digits
(see
Table 5: Medium-density STM32F103xx pin definitions
clarified.
Table 26: Low-power mode wakeup timings
T
Note 2
V
Note 3
Output voltage
Note 1
Equation 1
Section 5.3.17: 12-bit ADC
V
and t
Figure 36: ADC accuracy characteristics
below
Electrostatic discharge (ESD) on page 57
Number of TIM4 channels modified in
performance line block
Maximum current consumption
updated. V
Table 48: ADC accuracy
conditions at power-up /
EMS
Values corrected, note 2 modified and note 3 removed in
Low-power mode wakeup
Table 16: Typical and maximum current consumptions in Stop and
Standby
modified,
Table 21: Typical current consumption in Standby mode
peripheral current consumption on page 48
ACC
V
Upper option byte address modified in
Typical f
internal RC value corrected from 32 to 40 kHz in entire document.
T
Table 29: Flash memory endurance and data
T
Handling of unused pins specified in
characteristics on page
Figure 38: Power supply and reference decoupling (V
connected to V
t
Appendix A: Important notes on page 81
Added
JITTER
A
AIN
S_temp
S_vrefint
ESD(CDM)
prog
min corrected in
Doc ID 13587 Rev 12
, t
HSI
Section 6: Package
latr
characteristics.
added to
S
Figure 37: Typical connection diagram using the
Figure
added below
added and V
modified under
and f
added in
max, t
LSI
values updated in
added to
modes: Typical values added for V
added to
Note 2
hys
value added to
and
value added in
VCO
modified in
CONV
15,
DDA
Table 28: Flash memory
characteristics.
Table 46: R
removed from
added.
Table 45: ADC
Table 49: TS
Figure
Table 12: Embedded internal reference
)
, V
Table 12: Embedded internal reference
OH
modified.
Table 22: HSE 4-16 MHz oscillator
Table 2: STM32F103xx medium-density device
REF+
Table 36: I/O AC
diagram.
parameter description modified in
counts)
58. All I/Os are CMOS and TTL compliant.
power-down. V
updated. t
characteristics).
16,
Table 34: I/O static
timings.
Table 32: ESD absolute maximum
Table 24: HSI oscillator
Table 25: LSI oscillator characteristics
AIN
min and t
characteristics.
Figure 18
Changes
max for f
characteristics. N
Table 27: PLL
Table
characteristics.
Section 6: Package
VDD
lat
General input/output
13,
Figure 1: STM32F103xx
Figure 10: Memory
and
max modified, notes modified
modified in
FESD
ADC
characteristics.
characteristics.
updated.
Table 14
added.
modified.
DD
Figure
updated.
added.
= 14 MHz
characteristics.
value added in
retention.
/V
characteristics.
BAT
END
Note 1
and
characteristics.
20.
Table 10: Operating
= 2.4 V,
Revision history
modified in
REF+
characteristics).
added to
Table 15
updated and
ADC.
added.
characteristics.
Table 26:
Table 35:
modified
voltage.
map.
not
voltage.
Note 2
Table 30:
ratings.
On-chip
and
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