STM32F103T8U6 STMicroelectronics, STM32F103T8U6 Datasheet - Page 95

MCU 32BIT ARM 64K FLASH 36VFQFPN

STM32F103T8U6

Manufacturer Part Number
STM32F103T8U6
Description
MCU 32BIT ARM 64K FLASH 36VFQFPN
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32F103T8U6

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
DMA, Motor Control PWM, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
26
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
36-VFQFN, 36-VFQFPN
Processor Series
STM32F103x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
20 KB
Interface Type
CAN/I2C/SPI/USART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
26
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ST-LINK
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10-ch x 12-bit)
Controller Family/series
(ARM Cortex) STM32
No. Of I/o's
26
Ram Memory Size
20KB
Cpu Speed
72MHz
No. Of Timers
4
No. Of Pwm Channels
12
Rohs Compliant
Yes
Featured Product
STM32 Cortex-M3 Companion Products
Eeprom Size
-
For Use With
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Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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STM32F103x8, STM32F103xB
Table 59.
22-Sep-2009
23-Apr-2009
03-Jun-2010
Date
Document revision history (continued)
Revision
10
11
12
I/O information clarified
Figure 3: STM32F103xx performance line LFBGA100 ballout
Figure 10: Memory map
added.
PB4, PB13, PB14, PB15, PB3/TRACESWO moved from Default
column to Remap column in
pin
P
Note modified in
mode, code with data processing running from Flash
Maximum current consumption in Sleep mode, code running from
Flash or
Table 20: High-speed external user clock characteristics
Low-speed external user clock characteristics
Figure 19
modified in
TFBGA64 package added (see
changes.
Note 5
STM32F103xx pin
V
voltage. I
current consumptions in Stop and Standby
current consumption on V
different V
f
characteristics.
C
characteristics
32.768
oscillator characteristics
Low-power mode wakeup
Note 1
crystal.
IEC 1000 standard updated to IEC 61000 and SAE J1752/3 updated to
IEC 61967-2 in
Jitter added to
Table 41: SPI characteristics
C
R
Figure 44: LFBGA100 - 10 x 10 mm low profile fine pitch ball grid array
package outline
Added STM32F103TB devices.
Added VFQFPN48 package.
Updated note 2 below
Updated
Updated
Updated
HSE_ext
D
RERINT
L1
ADC
AIN
for LFBGA100 corrected in
Doc ID 13587 Rev 12
definitions.
and C
max values modified in
and R
updated and
modified below
kHz), notes modified and moved below the tables.
min modified in
RAM.
and T
DD_VBAT
Figure 31: I
Figure 30: Recommended NRST pin protection
Section 5.3.12: I/O port characteristics
shows a typical curve (title modified). ACC
BAT
L2
Table 24: HSI oscillator
AIN
replaced by C in
values
Coeff
Table 27: PLL
and
Section 5.3.10: EMC characteristics on page
parameters modified in
Table 13: Maximum current consumption in Run
updated.
value added to
definitions.
Table 23: LSE oscillator characteristics (f
added to
Note 4
2
added.
C bus AC waveforms and measurement circuit
Table 39: I
Figure 23: Typical application with an 8 MHz
on page
Table 20: High-speed external user clock
modified.
modified. Conditions removed from
BAT
timings.
added in
Table 5: Medium-density STM32F103xx
Table 46: R
Table 12: Embedded internal reference
modified.
characteristics.
with RTC on versus temperature at
Table 22: HSE 4-16 MHz oscillator
Changes
Table 9: General operating
Table 55
1.
2
Table 16: Typical and maximum
C characteristics
Table 4: Timer feature comparison
characteristics.
Table 5: Medium-density
Table 45: ADC
AIN
and
modes.
max for f
Table
modified.
50). Small text
Figure 17: Typical
Revision history
HSI
ADC
and
characteristics.
max values
and
Table 24: HSI
= 14
conditions.
Table 15:
LSE
Table 26:
Table 21:
55.
modified.
MHz.
=
95/96

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