ST62T65CM6 STMicroelectronics, ST62T65CM6 Datasheet - Page 24

IC MCU 8BIT OTP/EPROM 28 PSOIC

ST62T65CM6

Manufacturer Part Number
ST62T65CM6
Description
IC MCU 8BIT OTP/EPROM 28 PSOIC
Manufacturer
STMicroelectronics
Series
ST6r
Datasheet

Specifications of ST62T65CM6

Core Processor
ST6
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LED, LVD, POR, WDT
Number Of I /o
21
Program Memory Size
3.8KB (3.8K x 8)
Program Memory Type
OTP
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6 V
Data Converters
A/D 13x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
ST6
No. Of I/o's
21
Eeprom Memory Size
128Byte
Ram Memory Size
128Byte
Cpu Speed
8MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
ST62T6x
Core
ST6
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SCI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
21
Number Of Timers
1
Operating Supply Voltage
3 V to 6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2103-5

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
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Manufacturer:
ST
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Part Number:
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Manufacturer:
ST
Quantity:
202
Company:
Part Number:
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ST6255C ST6265C ST6265B
RESETS (Cont’d)
3.1.10 MCU Initialization Sequence
When a reset occurs the stack is reset, the PC is
loaded with the address of the Reset Vector (locat-
ed in program ROM starting at address 0FFEh). A
jump to the beginning of the user program must be
coded at this address. Following a Reset, the In-
terrupt flag is automatically set, so that the CPU is
in Non Maskable Interrupt mode; this prevents the
initialisation routine from being interrupted. The in-
itialisation routine should therefore be terminated
by a RETI instruction, in order to revert to normal
mode and enable interrupts. If no pending interrupt
is present at the end of the initialisation routine, the
MCU will continue by processing the instruction
immediately following the RETI instruction. If, how-
ever, a pending interrupt is present, it will be serv-
iced.
Figure 16. Reset Block Diagram
24/84
RESET
1) Resistive ESD protection. Value not guaranteed.
WATCHDOG RESET
POWER
LVD RESET
V
DD
ON RESET
R
PU
R
ESD
1)
f
OSC
AND. Wired
Figure 15. Reset and Interrupt Processing
VECTOR
RESET
RESET
INITIALIZATION
ROUTINE
RESET
CK
COUNTER
RESET
RETI
JP
JP:2 BYTES/4 CYCLES
RETI: 1 BYTE/2 CYCLES
ST6
INTERNAL
RESET
VR02107A
VA00181

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