MC908QY4ACDWE Freescale Semiconductor, MC908QY4ACDWE Datasheet - Page 55

IC MCU 8BIT 4K FLASH 16-SOIC

MC908QY4ACDWE

Manufacturer Part Number
MC908QY4ACDWE
Description
IC MCU 8BIT 4K FLASH 16-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908QY4ACDWE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Processor Series
HC08QY
Core
HC08
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
13
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

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AWUIE — Auto Wakeup Interrupt Enable Bit
4.6.4 Configuration Register 2
The configuration register 2 (CONFIG2), is used to allow the bus clock source to run in STOP. In this case,
the clock, BUSCLKX2 will be used to drive the AWU request generator.
OSCENINSTOP — Oscillator Enable in Stop Mode Bit
4.6.5 Configuration Register 1
The configuration register 1 (CONFIG1), is used to select the period for the AWU. The timeout will be
based on the COPRS bit along with the clock source for the AWU.
Freescale Semiconductor
This read/write bit enables the auto wakeup interrupt input to latch interrupt requests. Reset clears
AWUIE.
OSCENINSTOP, when set, will allow the bus clock source (BUSCLKX2) to generate clocks for the
AWU in stop mode. See
external clock sources.
1 = Auto wakeup enabled as interrupt input
0 = Auto wakeup not enabled as interrupt input
1 = Oscillator enabled to operate during stop mode
0 = Oscillator disabled during stop mode
Reset:
Read:
Write:
Reset: POR:
KBIE5–KBIE0 bits are not used in conjuction with the auto wakeup feature.
To see a description of these bits, see
Register
IRQPUD, IRQEN, and RSTEN bits are not used in conjuction with the auto
wakeup feature. To see a description of these bits, see
Configuration Register
Read:
Write:
IRQPUD
Bit 7
0
U = Unaffected
COPRS
(KBIER).
Bit 7
0
0
Figure 4-5. Configuration Register 2 (CONFIG2)
Figure 4-6. Configuration Register 1 (CONFIG1)
IRQEN
11.8.1 Oscillator Status and Control Register
6
0
MC68HC908QYA/QTA Family Data Sheet, Rev. 3
LVISTOP
6
0
0
R
(CONFIG).
5
0
LVIRSTD
5
0
0
R
4
0
NOTE
NOTE
LVIPWRD
4
0
0
9.8.2 Keyboard Interrupt Enable
R
3
0
LVITRIP
U
3
0
R
2
0
SSREC
2
0
0
Chapter 5
OSCENINSTOP
for information on enabling the
STOP
1
0
1
0
0
COPD
RSTEN
Bit 0
Bit 0
0
0
0
Registers
55

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