MCHC908QY4VDWE Freescale Semiconductor, MCHC908QY4VDWE Datasheet - Page 102
MCHC908QY4VDWE
Manufacturer Part Number
MCHC908QY4VDWE
Description
IC MCU 4K FLASH W/ADC 16-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908QY4MDWER.pdf
(184 pages)
Specifications of MCHC908QY4VDWE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Processor Series
HC08QY
Core
HC08
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
13
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCHC908QY4VDWE
Manufacturer:
Freescale Semiconductor
Quantity:
135
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Input/Output Ports (PORTS)
12.3.3 Port B Input Pullup Enable Register
The port B input pullup enable register (PTBPUE) contains a software configurable pullup device for each
of the eight port B pins. Each bit is individually configurable and requires the corresponding data direction
register, DDRBx, be configured as input. Each pullup device is automatically and dynamically disabled
when its corresponding DDRBx bit is configured as output.
PTBPUE[7:0] — Port B Input Pullup Enable Bits
102
Table 12-3
1. X = don’t care
2. I/O pin pulled to V
3. Writing affects data register, but does not affect input.
4. Hi-Z = high impedance
PTBPUE
These read/write bits are software programmable to enable pullup devices on port B pins
Bit
X
1
0
1 = Corresponding port B pin configured to have internal pull if its DDRB bit is set to 0
0 = Pullup device is disconnected on the corresponding port B pin regardless of the state of its
DDRB bit.
summarizes the operation of the port B pins.
Address: $000C
DDRB
Reset:
Read:
Write:
Bit
0
0
1
DD
Figure 12-8. Port B Input Pullup Enable Register (PTBPUE)
PTBPUE7
by internal pullup.
Bit 7
0
PTB
X
Bit
X
X
(1)
PTBPUE6
MC68HC908QY/QT Family Data Sheet, Rev. 6
Input, Hi-Z
6
0
Input, V
Table 12-3. Port B Pin Functions
I/O Pin
Output
Mode
PTBPUE5
DD
(2)
(4)
0
5
PTBPUE4
Accesses to DDRB
4
0
DDRB7–DDRB0
DDRB7–DDRB0
DDRB7–DDRB0
Read/Write
PTBPUE3
3
0
PTBPUE2
2
0
PTB7–PTB0
PTBPUE2
Read
Pin
Pin
1
0
Accesses to PTB
Freescale Semiconductor
PTBPUE0
Bit 0
0
PTB7–PTB0
PTB7–PTB0
PTB7–PTB0
Write
(3)
(3)
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