C8051F338-GMR Silicon Laboratories Inc, C8051F338-GMR Datasheet - Page 56
C8051F338-GMR
Manufacturer Part Number
C8051F338-GMR
Description
IC MCU 16K FLASH 24QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F33xr
Specifications of C8051F338-GMR
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
24-QFN
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
21
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F336DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
On-chip Dac
10 bit
Height
0.73 mm
Length
4 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Width
4 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
Q4962654
T1084322
T1084322
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C8051F336/7/8/9
10. Voltage Reference (C8051F336/8 only)
The Voltage reference multiplexer for the ADC is configurable to use an externally connected voltage refer-
ence, the on-chip reference voltage generator routed to the VREF pin, or the V
(see Figure 10.1). The REFSL bit in the Reference Control register (REF0CN, SFR Definition 10.1) selects
the reference source for the ADC. For an external source or the on-chip reference, REFSL should be set to
‘0’ to select the VREF pin. To use V
The BIASE bit enables the internal voltage bias generator, which is used by many of the analog peripherals
on the device. This bias is automatically enabled when any peripheral which requires it is enabled, and it
does not need to be enabled manually. The bias generator may be enabled manually by writing a ‘1’ to the
BIASE bit in register REF0CN. The electrical specifications for the voltage reference circuit are given in
Section “6. Electrical Characteristics” on page
The on-chip voltage reference circuit consists of a 1.2 V, temperature stable bandgap voltage reference
generator and a gain-of-two output buffer amplifier. The on-chip voltage reference can be driven on the
VREF pin by setting the REFBE bit in register REF0CN to a ‘1’. The maximum load seen by the VREF pin
must be less than 200 µA to GND. Bypass capacitors of 0.1 µF and 4.7 µF are recommended from the
VREF pin to GND. If the on-chip reference is not used, the REFBE bit should be cleared to ‘0’.
Important Note about the VREF Pin: When using either an external voltage reference or the on-chip ref-
erence circuitry, the VREF pin should be configured as an analog pin and skipped by the Digital Crossbar.
Refer to
of how to configure the pin in analog mode and to be skipped by the crossbar.
56
Section “20. Port Input/Output” on page 119
VDD
GND
Figure 10.1. Voltage Reference Functional Block Diagram
Recommended Bypass
4.7μF
R1
Capacitors
+
Reference
External
Voltage
Circuit
0.1μF
VREF
DD
as the reference source, REFSL should be set to ‘1’.
VDD
REF0CN
Rev.1.0
27.
0
1
IOSCE
for the location of the VREF pin, as well as details
N
Reference
REFBE
Internal
EN
EN
EN
Bias Generator
Temp Sensor
DD
To Analog Mux
(to ADC)
VREF
To ADC, IDAC,
Internal Oscillators
power supply voltage
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