TMP86FS28DFG(JZ) Toshiba, TMP86FS28DFG(JZ) Datasheet - Page 28
TMP86FS28DFG(JZ)
Manufacturer Part Number
TMP86FS28DFG(JZ)
Description
IC MCU 8BIT FLASH 60KB 80-LQFP
Manufacturer
Toshiba
Series
TLCS-870/Cr
Datasheet
1.TMP86FS28DFGJZ.pdf
(272 pages)
Specifications of TMP86FS28DFG(JZ)
Core Processor
870/C
Core Size
8-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
LCD, PWM, WDT
Number Of I /o
62
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Processor Series
TLCS-870
Core
870/C
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SIO, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
62
Number Of Timers
6
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
BM1040R0A, BMP86A100010A, BMP86A100010B, BMP86A200010B, BMP86A200020A, BMP86A300010A, BMP86A300020A, BMP86A300030A, SW89CN0-ZCC, SW00MN0-ZCC
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
BM1401W0A-G - FLASH WRITER ON-BOARD PROGRAMTMP89C900XBG - EMULATION CHIP TMP89F LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
TMP86FS28DFGJZ
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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2.2 System Clock Controller
(a) Single-clock mode
(b) Dual-clock mode
Note 1: NORMAL1 and NORMAL2 modes are generically called NORMAL; SLOW1 and SLOW2 are called SLOW; IDLE0, IDLE1
Note 2: The mode is released by falling edge of TBTCR<TBTCK> setting.
Table 2-1 Operating Mode and Conditions
Single clock
Dual clock
Operating Mode
and IDLE2 are called IDLE; SLEEP0, SLEEP1 and SLEEP2 are called SLEEP.
SLEEP2
SLEEP1
IDLE1
IDLE2
mode
mode
mode
mode
RESET
NORMAL1
IDLE1
IDLE0
STOP
NORMAL2
IDLE2
SLOW2
SLEEP2
SLOW1
SLEEP1
SLEEP0
STOP
Figure 2-6 Operating Mode Transition Diagram
SYSCR2<IDLE> = "1"
SYSCR2<IDLE> = "1"
SYSCR2<IDLE> = "1"
SYSCR2<TGHALT> = "1"
Frequency
Oscillation
Oscillation
SYSCR2<IDLE> = "1"
SYSCR2<SYSCK> = "0"
High
Stop
Stop
SYSCR2<XTEN> = "0"
SYSCR2<XEN> = "1"
Oscillator
Interrupt
Interrupt
Interrupt
Interrupt
Frequency
Oscillation
Stop
Stop
Low
Note 2
Page 16
high frequency
low frequency
low frequency
Operate with
Operate with
Operate with
CPU Core
Operate
NORMAL1
NORMAL2
Reset
SLEEP0
Halt
Halt
Halt
Halt
SLOW2
SLOW1
IDLE0
mode
mode
mode
mode
mode
mode
SYSCR2<XTEN> = "1"
SYSCR2<SYSCK> = "1"
SYSCR2<XEN> = "0"
Note 2
SYSCR2<TGHALT> = "1"
Operate
Operate
Reset
SYSCR1<STOP> = "1"
TBT
Halt
Halt
SYSCR1<STOP> = "1"
SYSCR1<STOP> = "1"
STOP pin input
STOP pin input
STOP pin input
Peripherals
Operate
Operate
Other
Reset
Halt
Halt
Reset release
Machine Cycle
4/fc [s]
4/fc [s]
4/fs [s]
TMP86FS28DFG
Time
–
–
RESET
STOP
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