TMP86FS28DFG(JZ) Toshiba, TMP86FS28DFG(JZ) Datasheet - Page 47

• Manufacturer Part Number: TMP86FS28DFG(JZ)
• Description: IC MCU 8BIT FLASH 60KB 80-LQFP
• Manufacturer: Toshiba
• Series: TLCS-870/Cr

Specifications of TMP86FS28DFG(JZ)

• Core Processor: 870/C
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Processor Series: TLCS-870
• Core: 870/C
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SIO, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 62
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: BM1040R0A, BMP86A100010A, BMP86A100010B, BMP86A200010B, BMP86A200020A, BMP86A300010A, BMP86A300020A, BMP86A300030A, SW89CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: BM1401W0A-G - FLASH WRITER ON-BOARD PROGRAMTMP89C900XBG - EMULATION CHIP TMP89F LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: TMP86FS28DFGJZ

3. Interrupt Control Circuit
Internal/External
Four of the internal interrupt sources are non-maskable while the rest are maskable.
The interrupt latch is set to “1” by the generation of its interrupt request which requests the CPU to accept its inter-
rupts. Interrupts are enabled or disabled by software using the interrupt master enable flag (IMF) and interrupt enable
flag (EF). If more than one interrupts are generated simultaneously, interrupts are accepted in order which is domi-
nated by hardware. However, there are no prioritized interrupt factors among non-maskable interrupts.
The TMP86FS28DFG has a total of 23 interrupt sources excluding reset. Interrupts can be nested with priorities.
Interrupt sources are provided with interrupt latches (IL), which hold interrupt requests, and independent vectors.
Note 1: To use the address trap interrupt (INTATRAP), clear WDTCR1<ATOUT> to “0” (It is set for the “reset request” after reset is
Note 2: To use the watchdog timer interrupt (INTWDT), clear WDTCR1<WDTOUT> to "0" (It is set for the "Reset request" after
External
External
External
External
External
External
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
-
-
-
-
-
-
-
-
-
cancelled). For details, see “Address Trap”.
reset is released). For details, see "Watchdog Timer".
(Reset)
INTSWI (Software interrupt)
INTUNDEF (Executed the undefined instruction
interrupt)
INTATRAP (Address trap interrupt)
INTWDT (Watchdog timer interrupt)
INT0
INT1
INTTBT
INTTC10
INTRXD0
INTTXD0
INTTC11
INT2
Reserved
INTSIO
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
INTTC3
INTTC4
INT3
INTTC5
INTTC6
INT4
INT5
INTRXD1
INTTXD1
INTADC
Reserved
Reserved
Interrupt Factors
Page 35
Non-maskable
Non-maskable
Non-maskable
Non-maskable
Non-maskable
IMF• EF4 = 1, INT0EN = 1
IMF• EF5 = 1
IMF• EF6 = 1
IMF• EF7 = 1
IMF• EF8 = 1
IMF• EF9 = 1
IMF• EF10 = 1
IMF• EF11 = 1
IMF• EF12 = 1
IMF• EF13 = 1
IMF• EF14 = 1
IMF• EF15 = 1
IMF• EF16 = 1
IMF• EF17 = 1
IMF• EF18 = 1
IMF• EF19 = 1
IMF• EF20 = 1
IMF• EF21 = 1
IMF• EF22 = 1
IMF• EF23 = 1
IMF• EF24 = 1
IMF• EF25 = 1
IMF• EF26 = 1
IMF• EF27 = 1
IMF• EF28 = 1
IMF• EF29 = 1
IMF• EF30 = 1
IMF• EF31 = 1
Enable Condition
Interrupt
Latch
IL10
IL12
IL13
IL14
IL15
IL16
IL17
IL18
IL19
IL20
IL21
IL22
IL23
IL24
IL25
IL26
IL27
IL28
IL29
IL30
IL31
IL11
IL2
IL3
IL4
IL5
IL6
IL7
IL8
IL9
–
–
–
TMP86FS28DFG
Address
Vector
FFFE
FFFC
FFFC
FFEE
FFEC
FFEA
FFBE
FFBC
FFBA
FFAE
FFAC
FFAA
FFFA
FFF8
FFF6
FFF4
FFF2
FFF0
FFE8
FFE6
FFE4
FFE2
FFE0
FFB8
FFB6
FFB4
FFB2
FFB0
FFA8
FFA6
FFA4
FFA2
FFA0
Priority
10
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
11
2
2
2
2
5
6
7
8
9
1