TMP86FS28DFG(JZ) Toshiba, TMP86FS28DFG(JZ) Datasheet - Page 49

• Manufacturer Part Number: TMP86FS28DFG(JZ)
• Description: IC MCU 8BIT FLASH 60KB 80-LQFP
• Manufacturer: Toshiba
• Series: TLCS-870/Cr

Specifications of TMP86FS28DFG(JZ)

• Core Processor: 870/C
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Processor Series: TLCS-870
• Core: 870/C
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SIO, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 62
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: BM1040R0A, BMP86A100010A, BMP86A100010B, BMP86A200010B, BMP86A200020A, BMP86A300010A, BMP86A300020A, BMP86A300030A, SW89CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: BM1401W0A-G - FLASH WRITER ON-BOARD PROGRAMTMP89C900XBG - EMULATION CHIP TMP89F LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: TMP86FS28DFGJZ

Example 1 :Enables interrupts individually and sets IMF
Example 2 :C compiler description example
3.2.2 Individual interrupt enable flags (EF29 to EF4)
bit of an individual interrupt enable flag to “1” enables acceptance of its interrupt, and setting the bit to “0” dis-
ables acceptance. During reset, all the individual interrupt enable flags (EF29 to EF4) are initialized to “0” and
all maskable interrupts are not accepted until they are set to “1”.
Each of these flags enables and disables the acceptance of its maskable interrupt. Setting the corresponding
Note:In main program, before manipulating the interrupt enable flag (EF) or the interrupt latch (IL), be sure to clear
IMF to "0" (Disable interrupt by DI instruction). Then set IMF newly again as required after operating on the EF
or IL (Enable interrupt by EI instruction)
In interrupt service routine, because the IMF becomes "0" automatically, clearing IMF need not execute nor-
mally on interrupt service routine. However, if using multiple interrupt on interrupt service routine, manipulat-
ing EF or IL should be executed before setting IMF="1".
DI
LDW
EI
unsigned int _io (3AH) EIRL;
_DI();
EIRL = 10100000B;
_EI();
:
:
:
(EIRL), 1110100010100000B
Page 37
; IMF
; EF15 to EF13, EF11, EF7, EF5
; IMF
/* 3AH shows EIRL address */
Note: IMF should not be set.
←
←
0
1
←
1
TMP86FS28DFG