S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 243

no-image

S9S12XS256J0CAL

Manufacturer Part Number
S9S12XS256J0CAL
Description
MCU 256K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12XS256J0CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
8K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XS
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
91
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12XSFAME, EVB9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S9S12XS256J0CAL
Manufacturer:
FREESCALE
Quantity:
3 598
Part Number:
S9S12XS256J0CAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
S9S12XS256J0CAL
Manufacturer:
FREESCALE
Quantity:
3 598
Part Number:
S9S12XS256J0CAL
Manufacturer:
FREESCALE
Quantity:
20 000
Read: Anytime
Write: Anytime
8.3.2.6
This register controls S12XECRG clock selection. Refer
bit.
Read: Anytime
Write: Refer to each bit for individual write conditions
Freescale Semiconductor
Module Base + 0x0005
LOCKIE
SCMIE
Reset
Field
RTIE
7
4
1
W
R
PLLSEL
Real Time Interrupt Enable Bit
0 Interrupt requests from RTI are disabled.
1 Interrupt will be requested whenever RTIF is set.
Lock Interrupt Enable Bit
0 LOCK interrupt requests are disabled.
1 Interrupt will be requested whenever LOCKIF is set.
Self Clock Mode Interrupt Enable Bit
0 SCM interrupt requests are disabled.
1 Interrupt will be requested whenever SCMIF is set.
S12XECRG Clock Select Register (CLKSEL)
0
7
= Unimplemented or Reserved
PSTP
Figure 8-8. S12XECRG Clock Select Register (CLKSEL)
0
6
S12XS Family Reference Manual Rev. 1.11
Table 8-5. CRGINT Field Descriptions
XCLKS
0
5
0
0
4
Description
toFigure 8-16
PLLWAI
0
3
S12XE Clocks and Reset Generator (S12XECRGV1)
for more details on the effect of each
0
0
2
RTIWAI
0
1
COPWAI
0
0
243

Related parts for S9S12XS256J0CAL