R5F21324CNSP#U0 Renesas Electronics America, R5F21324CNSP#U0 Datasheet - Page 219

MCU 1KB FLASH 16K ROM 20-LSSOP

R5F21324CNSP#U0

Manufacturer Part Number
R5F21324CNSP#U0
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Cr
Datasheet

Specifications of R5F21324CNSP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
R8C/32C Group
REJ09B0573-0100 Rev.1.00 Dec. 18, 2009
Page 190 of 573
17.2
17.2.1
Notes:
17.2.2
After Reset
1. Refer to 17.8 Notes on Timer RA for precautions regarding bits TSTART and TCSTF.
2. When the TSTOP bit is set to 1, bits TSTART and TCSTF and registers TRAPRE and TRA are set to the values
3. Bits TEDGF and TUNDF can be set to 0 by writing 0 to these bits by a program. However, their value remains
4. Set to 0 in timer mode, pulse output mode, and event counter mode.
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0100h
Address 0101h
after a reset.
unchanged when 1 is written.
In pulse width measurement mode and pulse period measurement mode, use the MOV instruction to set the
TRACR register. If it is necessary to avoid changing the values of bits TEDGF and TUNDF, write 1 to them.
Symbol
Symbol TIOGT1
Registers
TEDGSEL TRAIO polarity switch bit
TSTART Timer RA count start bit
Symbol
TSTOP Timer RA count forcible stop bit
TEDGF Active edge judgment flag
TUNDF Timer RA underflow flag
TCSTF
TIOSEL
TIOGT0
TIOGT1
TOPCR
TOENA
Bit
Bit
Symbol
TIPF0
TIPF1
Timer RA Control Register (TRACR)
Timer RA I/O Control Register (TRAIOC)
b7
b7
0
0
Timer RA count status flag
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
TRAIO output control bit
TRAO output enable bit
Hardware LIN function select bit
TRAIO input filter select bit
TRAIO event input control bit
TIOGT0
b6
b6
0
0
Bit Name
Bit Name
TUNDF
TIPF1
b5
b5
0
0
(1)
(3, 4)
(3, 4)
(1)
TEDGF
TIPF0
b4
b4
0
0
(2)
0: Count stops
1: Count starts
0: Count stops
1: During count
When this bit is set to 1, the count is forcibly stopped.
When read, its content is 0.
0: Active edge not received
1: Active edge received (end of measurement period)
0: No underflow
1: Underflow
TIOSEL
Function varies according to the operating mode. R/W
b3
b3
0
0
TOENA
TSTOP
b2
b2
0
0
Function
TOPCR TEDGSEL
TCSTF
Function
b1
b1
0
0
TSTART
b0
0
b0
0
17. Timer RA
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R

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